Patents by Inventor An-Cheng Chang
An-Cheng Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240194999Abstract: A robot includes a limit device and an energy storehouse, the limiting device may lock or loosen a battery opened in the energy storehouse, the limiting device includes a first connecting member, a transmission rod, and a second connecting member. The first connecting member includes a first main body portion and two first connecting elements arranged at intervals. The two first connecting elements are respectively connected to the first main body. The transmission rod includes a first end and a second end arranged at intervals. The first end penetrates through one of the two first connecting elements. The second end penetrates through the other one of the two first connecting element. The second connecting member includes two indexing buckles arranged at intervals, each of the indexing buckles includes a first limiting groove and a second limiting groove.Type: ApplicationFiled: February 21, 2024Publication date: June 13, 2024Inventors: CHEN-TING KAO, CHI-CHENG WEN, YU-SHENG CHANG, CHIH-CHENG LEE, CHIUNG-HSIANG WU, SHENG-LI YEN, YU-CHENG ZHANG, CHANG-JU HSIEH, CHEN CHAO
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Publication number: 20240194765Abstract: A method of manufacturing a semiconductor device includes forming a multi-layer stack of alternating first layers of a first semiconductor material and second layers of a second semiconductor material on a semiconductor substrate, forming a first recess through the multi-layer stack, and laterally recessing sidewalls of the second layers of the multi-layer stack. The sidewalls are adjacent to the first recess. The method further includes forming inner spacers with respective seams adjacent to the recessed second layers of the multi-layer stack and performing an anneal treatment on the inner spacers to close the respective seams.Type: ApplicationFiled: January 29, 2024Publication date: June 13, 2024Inventors: Yoh-Rong Liu, Wen-Kai Lin, Che-Hao Chang, Chi On Chui, Yung-Cheng Lu, Li-Chi Yu, Sen-Hong Syue
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Publication number: 20240192744Abstract: In an embodiment, a circuit includes: an error amplifier; a temperature sensor, wherein the temperature sensor is coupled to the error amplifier; a discrete time controller coupled to the error amplifier, wherein the discrete time controller comprises digital circuitry; a multiple bits quantizer coupled to the discrete time controller, wherein the multiple bits quantizer produces a digital code output; and a heating array coupled to the multiple bits quantizer, wherein the heating array is configured to generate heat based on the digital code output.Type: ApplicationFiled: February 20, 2024Publication date: June 13, 2024Inventors: Jui-Cheng HUANG, Yi-Hsing HSIAO, Yu-Jie HUANG, Tsung-Tsun CHEN, Allen Timothy CHANG
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Publication number: 20240194767Abstract: Semiconductor structures and methods of forming the same are provided. A method according to the present disclosure includes forming a stack of epitaxial layers over a substrate, forming a first fin-like structure and a second fin-like structure from the stack, forming an isolation feature between the first fin-like structure and the second fin-like structure, forming a cladding layer over the first fin-like structure and the second fin-like structure, conformally depositing a first dielectric layer over the cladding layer, depositing a second dielectric layer over the first dielectric layer, planarizing the first dielectric layer and the second dielectric layer until the cladding layer are exposed, performing an etch process to etch the second dielectric layer to form a helmet recess, performing a trimming process to trim the first dielectric layer to widen the helmet recess, and depositing a helmet feature in the widened helmet recess.Type: ApplicationFiled: January 29, 2024Publication date: June 13, 2024Inventors: Jen-Hong Chang, Yuan-Ching Peng, Chung-Ting Ko, Kuo-Yi Chao, Chia-Cheng Chao, You-Ting Lin, Chih-Chung Chang, Yi-Hsiu Liu, Jiun-Ming Kuo, Sung-En Lin
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Publication number: 20240192538Abstract: A display apparatus having a privacy mode and a sharing mode is provided. The display apparatus includes a display panel, a privacy liquid crystal module, and a touch sensing module. The touch sensing module is disposed on a side of the privacy liquid crystal module and is configured to generate a touch signal. When the display apparatus is in the privacy mode, the privacy liquid crystal module is applied with a first voltage. When the display apparatus is in the sharing mode and the touch sensing module generates the touch signal, the privacy liquid crystal module is applied with a second voltage for a predetermined time. After maintaining for the predetermined time, a third voltage is applied to the privacy liquid crystal module. The display apparatus can effectively reduce a smear phenomenon caused by the display apparatus being touched in a sharing mode.Type: ApplicationFiled: December 3, 2023Publication date: June 13, 2024Applicant: Coretronic CorporationInventors: Chih-Hsuan Kuo, Ming-Hsiung Fan, Yi-Cheng Lin, Chin-Lung Chen, Cheng-Wei Zhu, Chin-Yuan Chang
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Publication number: 20240194758Abstract: A method for forming a gate all around transistor includes forming a plurality of semiconductor nanosheets. The method includes forming a cladding inner spacer between a source region of the transistor and a gate region of the transistor. The method includes forming sheet inner spacers between the semiconductor nanosheets in a separate deposition process from the cladding inner spacer.Type: ApplicationFiled: February 22, 2024Publication date: June 13, 2024Inventors: Zhi-Chang LIN, Kuan-Ting PAN, Shih-Cheng CHEN, Jung-Hung CHANG, Lo-Heng CHANG, Chien-Ning YAO, Kuo-Cheng CHIANG
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Publication number: 20240189243Abstract: A lipid compound or a derivative thereof and a pharmaceutical composition employing the same are provided. The lipid compound has a structure represented by Formula (I): wherein Z1, Z2, Z3 and Z4 are as disclosed in the specification.Type: ApplicationFiled: November 13, 2023Publication date: June 13, 2024Applicant: Industrial Technology Research InstituteInventors: Felice Cheng, Ping-Fu Cheng, Jenn-Tsang Hwang, Chih-Wei Fu, Ku-Feng Lin, Ya-Ling Chiu, Jheng-Sian Li, Kang-Li Wang, Siou-Han Chang, Chia-Yu Fan
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Publication number: 20240194676Abstract: A semiconductor device according to the present disclosure includes a first gate structure and a second gate structure aligned along a direction, a first metal layer disposed over the first gate structure, a second metal layer disposed over the second gate structure, and a gate isolation structure extending between the first gate structure and the second gate structure as well as between the first metal layer and the second metal layer.Type: ApplicationFiled: February 26, 2024Publication date: June 13, 2024Inventors: Jia-Chuan You, Chia-Hao Chang, Kuo-Cheng Chiang, Kuan-Lun Cheng, Chih-Hao Wang
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Publication number: 20240194338Abstract: An auxiliary assessment method for cardiac function performed by a computing unit includes collecting a number of heartbeats and an amount of movement of a subject in a period of time; and calculating a distance per beat to assess cardiac function of the subject. The distance per beat is defined by dividing the amount of movement by the number of heartbeats. A length of the period of time is defined between at least two adjacent heartbeats. The amount of movement corresponds to a cumulative amount of movement in the period of time.Type: ApplicationFiled: July 25, 2023Publication date: June 13, 2024Inventors: Chao-Wen CHEN, Hao-Yun KAO, Yu-Cheng CHUANG, Jo-Nan WU, Wen-Yen CHANG
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Publication number: 20240192723Abstract: A display apparatus includes a light-transmitting structural plate, some optical microscopic structures, an optical film, a base plate and some light emitting elements. The light-transmitting structural plate has a first side and a second side opposite to each other. The optical microscopic structures are regularly arrayed and formed on the first side or the second side. The optical microscopic structure has an inclined surface connecting at a connecting line and forming an angle ranging between 30 degrees and 150 degrees with a corresponding inclined surface of an adjacent one of the optical microscopic structures. The optical film is located on the first side. The base plate is separated from the second side by a space. The light emitting elements are located inside the space and disposed on the base plate. The light emitting elements respectively emit a light ray to the light-transmitting structural plate.Type: ApplicationFiled: February 22, 2024Publication date: June 13, 2024Inventors: Yu-Cheng CHANG, Shu-Ching PENG, Yu-Ming HUANG
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Publication number: 20240192549Abstract: An intelligent window includes two substrates and a dimming layer. Each substrate is electrically connected to a voltage source. A switchable electric field is formed between the two substrates. The dimming layer is formed by filling a liquid crystal material between the two substrates. The liquid crystal material is formed by mixing a chiral molecule, a dichroic dye, and a salt ion in a nematic liquid crystal. A weight percentage concentration of the chiral molecule in the liquid crystal material is determined according to a limitation formula (I). C is the weight percentage concentration, n is a birefringence index of the liquid crystal material, p is a chiral force of the chiral molecule in micrometer?1, D is a thickness of the dimming layer in micrometer, m1 is a constant of multiaxial absorption condition in micrometer, and m2 is a constant of normally transparent condition.Type: ApplicationFiled: October 22, 2021Publication date: June 13, 2024Inventors: TSUNG-HSIEN LIN, CHENG-CHANG LI, HENG-YI TSENG, HUNG-CHANG JAU, LI-MIN CHANG, KUAN-WU LIN
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Publication number: 20240194492Abstract: The disclosure is a separation method of bonded substrates. The bonded substrate is placed on a breathable plate of a debonding device to separate a wafer and a carrier substrate of the bonded substrate, and the wafer is placed on the breathable plate. A robot arm moves the wafer and the breathable plate to a cleaning device for cleaning, and then moves the wafer and the breathable plate to a relay device. Clamping units of the relay device clamp the breathable plate, and a bernoulli arm sucks the wafer and separates the wafer and the breathable plate, and then the robot arm transports the wafer and the breathable plate to a storage device respectively. The disclosure can automatically debond and clean the bonded substrate, and automatically move the wafer from the breathable plate, which can avoid the fragmentation of wafer.Type: ApplicationFiled: December 7, 2022Publication date: June 13, 2024Inventors: JUNG-HUA CHANG, JING-CHENG LIN, TA-HAO KUO
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Publication number: 20240194917Abstract: A hot box device and an operating method thereof are provided. The hot box device includes a first shell, a reformer, a burner, and a cathode inlet pipe. The first shell has a first cavity. The reformer is disposed in the first cavity. The burner is disposed in the reformer and has an opening. The cathode inlet pipe is disposed in the first cavity and extends through the first shell. The cathode inlet pipe is in fluid communication with the first cavity, and the opening of the burner is in fluid communication with the first cavity.Type: ApplicationFiled: January 10, 2023Publication date: June 13, 2024Applicant: Industrial Technology Research InstituteInventors: Shing-Cheng CHANG, Chia-Hsin LEE, Cheng-Hao YANG, Wen-Sheng CHANG, Chia-Hao CHEN
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Publication number: 20240194926Abstract: A containment apparatus for battery tray rack includes a pressing module, a securing module, and a controller. In response to that the containment apparatus is to form the containment on the battery tray rack, the controller controls the pressing module to apply a compressive force, so that the battery tray rack withstands a clamping pressure, and the controller controls the securing module to lock the battery tray rack to maintain the clamping pressure. In response to that the containment apparatus is to release the containment from the battery tray rack, the controller controls the pressing module to apply the compressive force, and the controller controls the securing module to unlock the battery tray rack, and then the controller controls the pressing module to cancel the compressive force.Type: ApplicationFiled: November 21, 2023Publication date: June 13, 2024Applicant: CHROMA ATE INC.Inventors: Ying-Cheng Chen, Wen-Chuan Chang, Ying-Chi Chen, Chuan-Tse Lin
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Patent number: 12006571Abstract: An atomic layer deposition apparatus for coating on fine powders is disclosed, which includes a vacuum chamber, a shaft sealing device, and a driving unit. The shaft sealing device includes an outer tube and an inner tube arranged in an accommodating space of the outer tube. The driving unit drives the vacuum chamber to rotate through the outer tube to agitate the fine powders in a reaction space of the vacuum chamber. An air extraction line and an air intake line are arranged in a connection space of the inner tube. The air extraction line is used to extract gas from the reaction space. The air intake line is used to transport non-reactive gas to the reaction space to blow the fine powders around in the reaction space and precursor gas to the reaction space to form thin films with uniform thickness on the surface of the fine powders.Type: GrantFiled: March 11, 2021Date of Patent: June 11, 2024Assignee: SKY TECH INC.Inventors: Jing-Cheng Lin, Ching-Liang Yi, Jung-Hua Chang, Chia-Cheng Ku
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Patent number: 12009216Abstract: A semiconductor structure includes a semiconductor fin extending from a substrate, a source/drain (S/D) feature disposed over the semiconductor fin, a silicide layer disposed over the S/D feature, where the silicide layer extends along a sidewall of the S/D feature, and an etch-stop layer (ESL) disposed along a sidewall of the silicide layer.Type: GrantFiled: July 25, 2023Date of Patent: June 11, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Chun-Hsiung Lin, Shih-Cheng Chen, Chih-Hao Wang, Jung-Hung Chang, Jui-Chien Huang
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Patent number: 12009215Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a substrate having a base portion and a fin portion over the base portion. The semiconductor device structure includes an epitaxial structure over the fin portion. The semiconductor device structure includes a dielectric fin over the base portion. The semiconductor device structure includes a silicide layer between the dielectric fin and the epitaxial structure. A void is between the silicide layer and the dielectric fin.Type: GrantFiled: April 21, 2023Date of Patent: June 11, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chun-Hsiung Lin, Jung-Hung Chang, Shih-Cheng Chen, Kuo-Cheng Chiang, Chih-Hao Wang
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Patent number: 12006324Abstract: Disclosed herein is a specific method of preparation of Trilaciclib. The said method is to provide an efficacy of a protection free synthetic method of Trilaciclib with less steps and good yields.Type: GrantFiled: December 19, 2022Date of Patent: June 11, 2024Assignee: CHUNGHWA CHEMICAL SYNTHESIS & BIOTECH CO. LTD.Inventors: Satyanarayana Kamani, Hsin-Yun Chang, Tzu-Chiang Lu, Chin-Cheng Mai
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Patent number: 12009406Abstract: A semiconductor device includes a fin extending from a substrate, a gate stack over and along a sidewall of the fin, a spacer along a first sidewall of the gate stack and the sidewall of the fin, a dummy gate material along the sidewall of the fin, wherein the dummy gate material is between the spacer and the gate stack, and a first epitaxial source/drain region in the fin and adjacent the gate stack.Type: GrantFiled: June 11, 2021Date of Patent: June 11, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Chih-Han Lin, Ming-Ching Chang, Chao-Cheng Chen
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Patent number: 12009407Abstract: A method of forming a semiconductor device includes: forming a dummy gate structure over a nanostructure, where the nanostructure overlies a fin that protrudes above a substrate, where the nanostructure comprises alternating layers of a first semiconductor material and a second semiconductor material; forming openings in the nanostructure on opposing sides of the dummy gate structure, the openings exposing end portions of the first semiconductor material and end portions of the second semiconductor material; recessing the exposed end portions of the first semiconductor material to form first sidewall recesses; filling the first sidewall recesses with a multi-layer spacer film; removing at least one sublayer of the multi-layer spacer film to form second sidewall recesses; and forming source/drain regions in the openings after removing at least one sublayer, where the source/drain regions seal the second sidewall recesses to form sealed air gaps.Type: GrantFiled: April 20, 2023Date of Patent: June 11, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Wen-Kai Lin, Yung-Cheng Lu, Che-Hao Chang, Chi On Chui