Abstract: An electrostatic substrate holder for use in an extreme ultraviolet radiation lithography system includes a substrate receiving surface having a plurality of gas passages in fluid communication with a variable gas pressure pump. Varying the pressure in a void space between the backside of the substrate and the substrate receiving surface of the substrate holder promotes removal of non-gaseous materials within the void space between the backside of the substrate and the substrate receiving surface of the substrate holder.

Abstract: The present invention relates to a method for producing a carbon fiber. In the method for producing the carbon fiber, a high pure acrylonitrile monomer with specific contents of impurities and a comonomer are used to produce an acrylonitrile copolymer, and the acrylonitrile copolymer is subjected to a spinning operation, a stretching operation, an oxidation treatment and a carbonization treatment in sequence, for obtaining the carbon fiber. The acrylonitrile copolymer with an appropriate falling-ball viscosity and an appropriate weight-average molecular weight is beneficial to the spinning operation, thereby reducing an inner pore diameter and enhancing strength of the resulted carbon fiber.

Abstract: The present invention discloses a data transmission apparatus having clock gating mechanism. Each of data transmission circuits has a flip-flop depth of N and receives a write clock signal and one of read clock signals to receive and output one of data signals. A write clock gating circuit receives a write clock gating enabling signal to transmit the write clock signal to the data transmission circuits. Each of read clock gating circuits receives one of read clock gating enabling signals to transmit one of the read clock signals. The gating signal transmission circuit has a flip-flop depth of N+M and receives the write and the read clock signals to receive the write clock gating enabling signal and output the read clock gating enabling signals. A largest timing difference among the read clock signals is P clock cycles and M is at least ?P?.

Abstract: A semiconductor structure and a method of forming the same are provided. The semiconductor structure includes a first work function layer, a second work function layer, a protective layer, a gate stack, a first liner, a second liner, a planarization layer, and a gate plug. The first work function layer is disposed on a substrate. The second work function layer is disposed on the first work function layer. The protective layer is disposed on the second work function layer. The gate stack is disposed on the protective layer. The first liner is disposed on the gate stack. The second liner is disposed on the first liner. The planarization layer is disposed on the second liner. The gate plug is disposed on the planarization layer and in contact with the first work function layer and the second work function layer.

Abstract: A control method and a controller related to electromagnetic tracking are provided. In the method, a working position is determined, and the working position is the position at which a magnetic field sensor is located relative to a magnetic field emitter; an electrical characteristic of the magnetic field emitter or the magnetic field sensor is adjusted to a target characteristic corresponding to the working position. In this way, the positioning accuracy may be improved.

Abstract: A light mixing module is provided. The light mixing module includes a first laser array, a second laser array, and one or more laser polarized fold mirrors. The first laser array is configured for emitting a plurality of polarized light beams having a first polarization state. The second array is configured for emitting a plurality of polarized light beams having the first polarization state. The second laser array is disposed opposite to the first laser array. The one or more laser polarized fold mirrors are disposed between the first laser array and the second laser array. The one or more laser polarized fold mirrors reflect the polarized light beams emitted by the first laser array and the polarized light beams emitted by the second laser array. Each one of the one or more laser polarized fold mirrors is configured to direct light beams from at least two different directions.

Abstract: An image display method for handling a dynamic image signal including a plurality of continuous video frames, wherein the method includes steps as follows: Firstly, a first display parameter is output to display an Nth video frame of the plurality of continuous video frames according to a first attribute data of the Nth video frame. Then, at least one of (N+K)th video frame is detected, and when the at least one of the (N+K)th video frame has second attribute data, the first display parameter is output to display the at least one of the (N+K)th video frames. Subsequently, an (N+K+1)th video frame is detected, and when the (N+K+1)th video frame has the second attribute data, a second display parameter is output to display the (N+K+1)th video frame according to the second attribute data. Wherein, K is a positive integer greater than 1.

Abstract: A spectrum analyzing method and a gingivitis evaluating device are provided. The spectrum analyzing method includes steps as follows. A diffuse reflection signal of a gingiva is calculated, and a gingiva spectrum is generated. The gingiva spectrum and a plurality of reference gingiva spectra are respectively applied with a time-series similarity calculation, and a plurality of similarity values are generated. The plurality of reference gingiva spectra correspond to various gingival indexes (GI). A minimum similarity value of the plurality of similarity values is obtained. A GI result is output according to the minimum similarity value.

Abstract: A display device is provided and includes a display panel, a light source, a light source controller, and a timing controller. The light source is adjacent to the display panel. The light source controller is electrically connected to the light source. The timing controller is electrically connected to the light source controller and the display panel. The timing controller includes a decoding unit and first and second processing units. The first processing unit is electrically connected to the decoding unit and the display panel. The second processing unit is electrically connected to the decoding unit and the light source controller. The decoding unit provides a refresh signal to the first and second processing units so that the display panel refreshes displayed content in a first refresh sequence according to first refresh rates, and the light source refreshes brightness in a second refresh sequence according to second refresh rates.

Abstract: A wide-band gap semiconductor device and a method of manufacturing the same are provided. The wide-band gap semiconductor device of the disclosure includes a substrate, an epitaxial layer, an array of merged PN junction Schottky (MPS) diode, and an edge termination area surrounding the array of MPS diode. The epitaxial layer includes a first plane, a second plane, and trenches between the first plane and the second plane. The array of MPS diode is formed in the first plane of the epitaxial layer. The edge termination area includes a floating ring region having floating rings formed in the second plane of the epitaxial layer, and a transition region between the floating ring region and the array of MPS diode. The transition region includes a PIN diode formed in the plurality of trenches and on the epitaxial layer between the trenches.

Abstract: A method includes bonding a first wafer to a second wafer, with a first plurality of dielectric layers in the first wafer and a second plurality of dielectric layers in the second wafer bonded between a first substrate of the first wafer and a second substrate in the second wafer. A first opening is formed in the first substrate, and the first plurality of dielectric layers and the second wafer are etched through the first opening to form a second opening. A metal pad in the second plurality of dielectric layers is exposed to the second opening. A conductive plug is formed extending into the first and the second openings.

Abstract: A die bonding device is provided to pick up a die and place the die on a carrier. The die bonding device includes a pick-and-placer and a vacuum generator. The pick-and-placer includes an adsorption surface, a first channel and a second channel, and the first channel and the second channel are not connected to each other. The vacuum generator includes a first vacuum pump and a second vacuum pump, the first vacuum pump is connected to the first channel via a pipeline, the second vacuum pump is connected to the second channel via another pipeline, the first vacuum pump and the second vacuum pump make the pick-and-placer adsorb the die to the adsorption surface during a vacuum holding period, and the first vacuum pump and the second vacuum pump respectively make the pick-and-placer release the die to the carrier sequentially in a vacuum release period.

Abstract: A merged PiN Schottky (MPS) diode includes a substrate, a first epitaxial layer of a first conductivity type, doped regions of a second conductivity type, a second epitaxial layer of the first conductivity type, and a Schottky metal layer. The first epitaxial layer is disposed on the first surface of the substrate. The doped regions are disposed in a surface of the first epitaxial layer, wherein the doped regions consist of first portions and second portions, the first portions are electrically floating, and the second portions are electrically connected to a top metal. The second epitaxial layer is disposed on the surface of the first epitaxial layer, wherein trenches are formed in the second epitaxial layer to expose the second portions of the doped regions. The Schottky metal layer is conformally deposited on the second epitaxial layer and the exposed second portions of the doped regions.

Abstract: An image processing method includes following operations: receiving, by a processor, an input image from a camera; performing, by the processor, a top-view calibration process to generate a top-view calibrated image according to the input image; performing, by the processor, an object extraction process on the top-view calibrated image to generate at least one target object frame; performing, by the processer, a centering process on the at least one target object frame to generate a centered image; and outputting, by the processor, the centered image for a display panel to display.

Abstract: A planar transformer is configured on a multi-layer circuit board of a resonant converter. The planar transformer includes multiple layers of primary-side traces, multiple layers of secondary-side traces, and an iron core. The primary-side traces serve as a primary-side coil of the transformer to generate a first direction magnetic flux when the resonant converter operates. The secondary-side traces serve as a secondary-side coil of the transformer to generate a second direction magnetic flux when the resonant converter operates. The primary-side traces and the secondary-side traces surround a first core pillar and the second core pillar, and the primary-side traces and the secondary-side traces are configured in a specific stacked structure on the multi-layer circuit board, so that a magnetomotive force of the planar transformer can maintain balance during the operation of the resonant converter.

Abstract: An ammonium fluoride gas may be used to form a protection layer for one or more interlayer dielectric layers, one or more insulating caps, and/or one or more source/drain regions of a semiconductor device during a pre-clean etch process. The protection layer can be formed through an oversupply of nitrogen trifluoride during the pre-clean etch process. The oversupply of nitrogen trifluoride causes an increased formation of ammonium fluoride, which coats the interlayer dielectric layer(s), the insulating cap(s), and/or the source/drain region(s) with a thick protection layer. The protection layer protects the interlayer dielectric layer(s), the insulating cap(s), and/or the source/drain region(s) during the pre-clean process from being etched by fluorine ions formed during the pre-clean process.

Abstract: The present disclosure discloses a memory access interface device. A clock generation circuit generates reference signals. A transmitter transmits an output command and address signal to a memory device according to the reference signals. A signal training circuit executes a training process in a training mode that includes steps outlined below. A training signal is generated such that the training signal is transmitted as the output command and address signal. The training signal and the data signal generated by the memory device are compared to generate a comparison result indicating whether the data signal matches the training signal. The comparison result is stored. The clock generation circuit is controlled to modify a phase of at least one of the reference signals to be one of a plurality of under-test phases to execute a new loop of the training process until all the under-test phases are trained.

Abstract: An audio signal amplifying device processes an input signal to provide an output signal for a balanced headphone. The device includes a signal detection circuit, a voltage supply circuit, and an amplifying circuit. The signal detection circuit detects the variation in the input signal to generate a detection result. The voltage supply circuit outputs one of multiple voltages as a supply voltage according to the detection result; when the detection result indicates the amplitude of the input signal satisfying a first condition, the supply voltage is a first voltage; when the detection result indicates the amplitude of the input signal satisfying a second condition, the supply voltage is a second voltage lower than the first voltage; and the amplitude satisfying the first condition is greater than the amplitude satisfying the second condition. The amplifying circuit generates the output signal according to the input signal based on the supply voltage.

Abstract: The present disclosure discloses a memory access interface device. A clock generation circuit generates reference clock signals. Each of access signal transmission circuits each includes a duty cycle adjusting circuit, a duty cycle detection circuit, a frequency division circuit and an asynchronous first-in-first-out circuit. The duty cycle adjusting circuit performs duty cycle adjustment on one of the reference clock signals according to a duty cycle detection signal to generate an output clock signal having a duty cycle. The duty cycle detection circuit detects a variation of the duty cycle to generate the duty cycle detection signal. The frequency division circuit divides a frequency of the output clock signal to generate a read clock signal. The asynchronous first-in-first-out circuit receives an access signal from a memory access controller and outputs an output access signal according to the read clock signal to access the memory device accordingly.