Abstract: A measurement assistance system and method are provided. The measurement assistance system includes: a measurement platform, having an operation area configured for a to-be-measured object and a measurement tool to be placed; a camera, arranged on the measurement platform and configured to obtain a measurement image; and a server module, electrically connected to the camera and configured to execute a measurement tool identification program, a measurement part identification program, and a measurement posture identification program according to the measurement image, and determine whether a measurement tool appearance image, a measurement part image, and a measurement posture image are correct. The server module has a processing unit. When the measurement tool appearance image, the measurement part image, and the measurement posture image are all correct, a measurement result is generated according to measurement data.

Abstract: A semiconductor structure comprises a substrate, an adhesion layer, arranged on the substrate, a first release layer, arranged on the adhesion layer and a first semiconductor device, comprising a semiconductor epitaxial stack, and a conducting layer directly connected to the first release layer, wherein the first semiconductor device is not electrically connected to the substrate by the adhesion layer and the first release layer.

Abstract: A semiconductor device and a manufacturing method thereof are provided. The semiconductor device includes a redistribution layer (RDL) module, a first semiconductor module, an interconnection module, a second semiconductor module and a molding material. The first semiconductor module is disposed on the RDL module. The interconnection module is disposed on the RDL module. The second semiconductor module is disposed on the interconnection module. The molding material covers the RDL module and surrounds the first semiconductor module and the second semiconductor module. A top surface of the first semiconductor module and a top surface of the second semiconductor module are exposed by the molding material.

Abstract: An optical element driving mechanism has an optical axis, and includes a fixed portion, a movable element, a plurality of blades, and a driving assembly. The fixed portion has an opening. The movable element is movable relative to the fixed portion. The blades are connected to the movable element. The driving assembly drives the movable element to move relative to the fixed portion. The driving assembly drives the movable element to change an overlap area of the blade and the opening.

Abstract: A semiconductor package and a manufacturing method for the semiconductor package are provided. The semiconductor package includes a molded semiconductor device, a first redistribution structure, and conductive vias. The molded semiconductor device comprises a sensor die with a first surface and a second surface opposite the first surface, wherein the sensor die has an input/output region and a sensing region at the first surface. The first redistribution structure is disposed on the first surface of the sensor die, wherein the first redistribution structure covers the input/output region and exposes the sensing region, and the first redistribution structure comprises a conductive layer having a redistribution pattern and a ring structure. The redistribution pattern is electrically connected with the sensor die. The ring structure surrounds the sensing region and is separated from the redistribution pattern, wherein the ring structure is closer to the sensing region than the redistribution pattern.

Abstract: An optical system affixed to an electronic apparatus is provided, including a first optical module, a second optical module, and a third optical module. The first optical module is configured to adjust the moving direction of a first light from a first moving direction to a second moving direction, wherein the first moving direction is not parallel to the second moving direction. The second optical module is configured to receive the first light moving in the second moving direction. The first light reaches the third optical module via the first optical module and the second optical module in sequence. The third optical module includes a first photoelectric converter configured to transform the first light into a first image signal.

Abstract: An optical system is provided, including a first module configured to hold a first optical member. The first module includes a first movable portion, a first fixed portion, and a first driving assembly. The first movable portion is configured to connect the first optical member, and is movable relative to the fixed portion. The first driving assembly is configured to drive the first movable portion to move relative to the fixed portion.

Abstract: An optical system that includes a first module is provided. The first module includes a first movable portion, a first fixed portion, and a first driving assembly. The first movable portion is configured to connect the first optical member, and is movable relative to the first fixed portion. The first driving assembly is configured to drive the first movable portion to move relative to the first fixed portion.

Abstract: A method of process technology assessment is provided. The method includes: defining a scope of the process technology assessment, the scope comprising an original process technology and a first process technology; modeling a first object in an integrated circuit into a resistance domain and a capacitance domain; generating a first resistance scaling factor and a first capacitance scaling factor based on the modeling, the original process technology, and the first process technology; and utilizing, by an electronic design automation (EDA) tool, the first resistance scaling factor and the first capacitance scaling factor for simulation of the integrated circuit.

Abstract: A voltage conversion device includes a filter circuit, a first inductor, a second inductor a first conversion module, a second conversion module, and a control circuit. The filter circuit is electrically connected to a first AC terminal and a second AC terminal. The first inductor is electrically connected to the first AC terminal and a first conversion terminal. The second inductor is electrically connected to the second AC terminal and a second conversion terminal. The first conversion module is electrically connected to a first DC voltage terminal, a second DC voltage terminal, and the first conversion terminal. The second conversion module is electrically connected to the first DC voltage terminal, the second DC voltage terminal, and the second conversion terminal. The control circuit transmits switch-control signals to the first conversion module and the second conversion module. A voltage conversion method is used with the voltage conversion device.

Abstract: A package includes a frontside redistribution layer (RDL) structure, a semiconductor die on the frontside RDL structure, and a backside RDL structure on the semiconductor die including a first RDL, and a backside connector extending from a distal side of the first RDL and including a tapered portion having a width that decreases in a direction away from the first RDL, wherein the tapered portion includes a contact surface at an end of the tapered portion. A method of forming the package may include forming the backside redistribution layer (RDL) structure, attaching a semiconductor die to the backside RDL structure, forming an encapsulation layer around the semiconductor die on the backside RDL structure, and forming a frontside RDL structure on the semiconductor die and the encapsulation layer.

Abstract: A multi-bit analog multiplication and accumulation circuit system, which includes: a plurality of analog multiplication circuits, first to fourth accumulation lines, and a binary place value combiner. Each of the analog multiplication circuits performs multiplications on four-bit input data and four-bit weight data, wherein each of the analog multiplication circuits includes four capacitor and switch arrays for performing multiplications on one bit of the four-bit input data and the four-bit weight data. Each of the accumulation lines outputs an accumulation of multiplications performed by each capacitor switch array of each analog multiplication circuit on one bit of the four-bit input data and the four-bit weight data. The binary place value combiner sums up the accumulated result outputted from the accumulation line with corresponding binary place value.

Abstract: An interconnect structure, along with methods of forming such, are described. In some embodiments, the method includes forming a first dielectric layer over one or more devices, forming a first conductive feature in the first dielectric layer, and forming two dielectric features over the first dielectric layer and the first conductive feature. At least one of the two dielectric features has a first width, and each dielectric feature includes a first low-k dielectric layer, an oxide layer, and a first etch stop layer. The method further includes forming a second conductive feature between the two dielectric features, and the second conductive feature has a second width substantially the same as the first width.

Abstract: A method includes forming a conductive feature through a first dielectric layer, sequentially forming a second dielectric layer and a third dielectric layer over the first dielectric layer, and etching the third dielectric layer to form an opening. A first width of the opening at a top surface of the third dielectric layer is greater than a second width of the opening at a first interface between the third dielectric layer and the second dielectric layer. The method also includes etching the second dielectric layer until the opening extends to the conductive feature, thereby forming an enlarged opening, and forming a metal material in the enlarged opening. A third width of the enlarged opening at the first interface is equal to or less than a fourth width of the enlarged opening at a second interface between the second dielectric layer and the first dielectric layer.

Abstract: An antenna structure includes a ground element, a first radiation element, a second radiation element, a third radiation element, and a nonconductive support element. The first radiation element is coupled to a first grounding point on the ground element. The second radiation element has a feeding point. The second radiation element is adjacent to the first radiation element. The third radiation element is coupled to a second grounding point on the ground element. The third radiation element is adjacent to the second radiation element. The first radiation element, the second radiation element, and the third radiation element are disposed on the nonconductive support element. The second radiation element is at least partially surrounded by the first radiation element. The third radiation element is at least partially surrounded by the second radiation element.

Abstract: An integrated circuit structure is provided. The integrated circuit structure includes a die that contains a substrate, an interconnection structure, active connectors and dummy connectors. The interconnection structure is disposed over the substrate. The active connectors and the dummy connectors are disposed over the interconnection structure. The active connectors are electrically connected to the interconnection structure, and the dummy connectors are electrically insulated from the interconnection structure.

Abstract: A semiconductor device includes a semiconductor layer. A gate structure is disposed over the semiconductor layer. A spacer is disposed on a sidewall of the gate structure. A height of the spacer is greater than a height of the gate structure. A liner is disposed on the gate structure and on the spacer. The spacer and the liner have different material compositions.

Abstract: An antenna structure capable of transmitting a WiGig band for a head-mounted wireless transmission display device including a display screen and an overhead device is disclosed. The antenna structure includes at least two body portions, each of the body portions having at least a signal transceiving end, the body portions are respectively arranged at left and right sides of the display screen, and signal transceiving ends of the body portions are extended outward from the left and right sides of the display screen respectively.

Abstract: An optical element driving mechanism is provided, including a fixed portion and a movable portion. The movable portion moves relative to the fixed portion. The movable portion includes a first movable assembly and a second movable assembly. The first movable assembly is connected to a first optical element. The second movable assembly is connected to a second optical element. The first movable assembly and the second movable assembly are movable relative to each other. The fixed portion further includes a first guiding element and a second guiding element. The first guiding element guides the first movable assembly and the second movable assembly to move in a first dimension. The second guiding element guides the first movable assembly and the second movable assembly to move in the first dimension. The first guiding element and the second guiding element are located at opposite corners of the fixed portion.

Abstract: A method for prelithiating a soft carbon negative electrode includes the steps of: disposing the soft carbon negative electrode and a lithium metal piece spaced apart from each other with a lithium-containing electrolyte present therebetween; prelithiating the soft carbon negative electrode at a first constant C-rate until a voltage thereof is reduced to a first predetermined voltage not greater than 0.3 V vs. Li/Li+, the first constant C-rate being not greater than 5 C; prelithiating the soft carbon negative electrode at a second constant C-rate until the voltage thereof is reduced to a second predetermined voltage lower than the first predetermined voltage, the second constant C-rate being not greater than 0.2 C and being less than the first constant C-rate; and prelithiating the soft carbon negative electrode at a prelithiation constant voltage which is not greater than the second predetermined voltage, thereby completing prelithiation of the soft carbon negative electrode.