Abstract: A phase error compensation circuit and a method for compensating a phase error between a reference clock and a feedback clock are provided. The phase error compensation circuit includes a first programmable delay circuit, a second programmable delay circuit and at least one swapping circuit. The first programmable delay circuit provides a first delay. The second programmable delay circuit provides a second delay. At a present cycle, the first delay is unchanged, wherein the swapping circuit applies the first delay to the feedback clock for generating a compensated feedback clock and applies the second delay to the reference clock for generating a compensated reference clock. At a next cycle, the second delay is unchanged, where the swapping circuit applies the second delay to the feedback clock for generating the compensated feedback clock and applies the first delay to the reference clock for generating the compensated reference clock.

Abstract: A semiconductor structure includes a first device unit and a second device unit, each of which includes channel features spaced apart from each other, and a dielectric wall disposed between the first and second device units. The dielectric wall includes a first part which includes a plurality of first portions that are in direct contact with the channel features of the first device unit, and a second part which includes a plurality of second portions that are in direct contact with the channel features of the second device unit. At least one of the first and second parts carries positive or negative charges.

Abstract: A neutron capture therapy system and a target material for a particle beam generation apparatus, the heat dissipation performance of a target material might be improved. A neutron capture therapy system includes a neutron generation apparatus and a beam shaping body, the neutron generation apparatus includes an accelerator and a target material, and a charged particle beam generated by means of acceleration of the accelerator acts with the target material to generate a neutron beam. The target material includes an active layer, an anti-foaming layer, a heat dissipation layer and a heat conduction layer, the active layer acts with a charged particle beam to generate a neutron beam; the anti-foaming layer suppresses foaming caused by the charged particle beam; the heat dissipation layer directly and rapidly conducts to the heat conduction layer, heat deposited on the active layer, and discharges by means of a cooling medium.

Abstract: An electronic device may include an electronic display having a gate-on-array (GOA) that generates gate signals in response to an activation signal, pixels that activate in response to a combination of the gate signals and data signals indicative of image data, and sensing circuitry. The sensing circuitry may measure a characteristic response of a gate signal a characteristic response of one or more pixels, or both and compare the characteristic responses to baselines. The electronic device may also include compensation circuitry that applies a compensation to the activation signal and/or to the image data based on the comparisons between the characteristic responses and the baselines.

Abstract: An antenna structure capable of transmitting a WiGig band for a head-mounted wireless transmission display device including a display screen and an overhead device is disclosed. The antenna structure includes at least two body portions, each of the body portions having at least a signal transceiving end, the body portions are respectively arranged at left and right sides of the display screen, and signal transceiving ends of the body portions are extended outward from the left and right sides of the display screen respectively.

Abstract: According to some embodiments, systems, methods, and media for operating an autonomous driving vehicle (ADV) encountered with small objects are described. According to a method, the ADV, when detecting an object in a lane in which the ADV is travelling, can determine whether the ADV can safely drive over the object based on attributes of the object and attributes of the ADV, and if so, can generate one or more planned trajectories that each enable the ADV to drive over the object. From the one or more planned trajectories, the ADV can select a planned trajectory that enables the ADV to drive over the object along the centerline of the ADV without causing the ADV to drive out of the lane. If no such planned trajectory exists, the ADV can bypass the object, or stop within a predetermined distance of the object.

Abstract: An apparatus and a method of wireless communication are provided. The method by a user equipment (UE) includes determining a first subframe, and/or determining a second subframe according to the first subframe, and performing a physical downlink control channel (PDCCH) monitoring according to the first subframe and/or the second subframe.

Abstract: An electronic device includes an image capturing module and a processing module. The image capturing module is configured to capture a hand to obtain a first hand image. The processing module is configured to receive the first hand image, process the first hand image through an artificial intelligence model to generate a first hand landmark, and control the electronic device to enter the unlock mode according to a first gesture corresponding to the first hand landmark.

Abstract: A micro light-emitting diode display device and a micro light-emitting diode structure. The micro light-emitting diode display device includes a circuit substrate and a plurality of display pixels, the display pixels are arranged on the circuit substrate and are electrically connected with the circuit substrate individually. Each display pixel includes a plurality of series-connection structures, and the light wavelengths of the series-connection structures are different. Each series-connection structure includes at least two micro light-emitting elements, and the light wavelengths of the at least two micro light-emitting elements are within a wavelength range of one color light. The circuit substrate provides a driving voltage to drive the series-connection structures of each display pixel.

Abstract: In one embodiment, an integrated circuit cell includes a first circuit component and a second circuit component. The first circuit component includes fin field-effect transistors (finFETs) formed in a high fin portion of the integrated circuit cell, the high fin portion of the integrated circuit including a plurality of fin structures arranged in rows. The second circuit component that includes finFETs formed in a less fin portion of the integrated circuit cell, the less fin portion of the integrated circuit including a lesser number of fin structures than the high fin portion of the integrated circuit cell.

Abstract: Provided is a polyester composite film, comprising a first thermoplastic polyether ester elastomer (TPEE) film and a second TPEE film. The melting point of a second TPEE resin of the second TPEE film is higher than that of a first TPEE resin of the first TPEE film, and the absolute difference in enthalpy of fusion between the first and second TPEE films is 5 J/g to 15 J/g. By adopting the first and second TPEE films having specific absolute difference of the enthalpy of fusion and controlling the melting points of the first and second TPEE resins, the polyester composite film can be well attached onto the fabric by hot pressing to obtain sufficient peel strength, and thereby the attached fabric can have excellent waterproof performance. Besides, a hot melt adhesive laminate comprising the polyester composite film also exhibits the above beneficial effects when attached to the fabric.

Abstract: Systems and methods for cell electroporation and molecular delivery using an intelligent, feedback controlled, microscale electroporation system for transfecting single cells.

Abstract: The invention provides a signal detector. The signal detector comprises a housing, having a connector and a display unit; a tuner, configured to receive a cable signal; a microcontroller unit (MCU), electrically connected with the tuner and the display unit; a scanning switch, electrically connected with the MCU; a power supply, configured to supply a power to the MCU; and a power switch, electrically connected with the MCU.

Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a substrate, a conductive feature on the substrate, and an electrical connection structure on the conductive feature. The electrical connection includes a first grain made of a first metal material, and a first inhibition layer made of a second metal layer that is different than the first metal material. The first inhibition layer extends vertically along a first side of a grain boundary of the first grain and laterally along a bottom of the grain boundary of the first grain.

Abstract: The present disclosure provides a semiconductor structure with having a source/drain feature with a central cavity, and a source/drain contact feature formed in central cavity of the source/drain region, wherein the source/drain contact feature is nearly wrapped around by the source/drain region. The source/drain contact feature may extend to a lower most of a plurality semiconductor layers.

Abstract: A capacitor on a fin structure includes a fin structure. A dielectric layer covers the fin structure. A first electrode extension is embedded within the fin structure. A first electrode penetrates the dielectric layer and contacts the first electrode extension. A second electrode and a capacitor dielectric layer are disposed within the dielectric layer. The capacitor dielectric layer surrounds the second electrode, and the capacitor dielectric layer is between the second electrode and the first electrode extension.

Abstract: Semiconductor structures and methods for manufacturing the same are provided. The semiconductor structure includes a gate structure formed over a substrate, and a first source/drain (S/D) structure formed adjacent to the gate structure. The semiconductor structure includes a first contact structure formed over a first side of the first S/D structure, and a portion of the first contact structure is lower than a top surface of the first S/D structure. The semiconductor structure includes a second contact structure formed over a second side of the first S/D structure, and the second contact structure is in direct contact with the first contact structure.

Abstract: A computer-executable method for generating a side-by-side three-dimensional (3D) image includes the steps of creating a 3D mesh and estimating depth information of the raw image. The method further includes the steps of updating the left mesh area and the right mesh area of the 3D mesh based on the estimated depth information of the raw image and projecting each of the mesh vertices of the left mesh area onto a coordinate system of the side-by-side 3D image based on a left eye position, and projecting each of the mesh vertices of the right mesh area onto the coordinate system of the side-by-side 3D image based on a right eye position. The method further obtains the side-by-side 3D image by coloring the left mesh area and the right mesh area projected onto the coordinate system of the side-by-side 3D image based on the raw image.

Abstract: A power supply circuit is provided. The power factor correction (PFC) circuit is used to perform a power factor correction according to a first voltage to generate an intermediate voltage. The first storage capacitor is used to store a first electrical energy related to the intermediate voltage. The boost conversion circuit is connected to the PFC circuit and used to generate an output voltage according to the intermediate voltage. The boost conversion circuit includes a first post-stage inductor, a first post-stage diode and a first post-stage transistor. The second storage capacitor is used to store a second electrical energy related to the output voltage. The capacitance value of the second storage capacitor is less than the capacitance value of the first storage capacitor; the first electrical energy is completely or partially transferred as the second electrical energy.

Abstract: A method of measuring chip characteristics includes: outputting an operating voltage to a chip by a test device, wherein the chip comprises a plurality of oscillator circuits configured to generate a plurality of oscillating signals according to the operating voltage; and testing the chip by the test device under a situation that the test device outputs a system clock signal having a first clock period to the chip, including: changing the operating voltage sequentially with the test device until the chip changes from a normal state to a failure state, so as to generate a boundary operating voltage; and recording the plurality of oscillating signals generated according to the boundary operating voltage as measurement data by the test device, wherein the measurement data represents chip characteristics of the chip corresponding to the first clock period.