Abstract: An integrated circuit (IC) comprising an enhanced passivation scheme for pad openings and trenches is provided. In some embodiments, an interlayer dielectric (ILD) layer covers a substrate and at least partially defines a trench. The trench extends through the ILD layer from a top of the ILD layer to the substrate. A conductive pad overlies the ILD layer. A first passivation layer overlies the ILD layer and the conductive pad, and further defines a pad opening overlying the conductive pad. A second passivation layer overlies the ILD layer, the conductive pad, and the first passivation layer, and further lines sidewalls of the first passivation layer in the pad opening and sidewalls of the ILD layer in the trench. Further, the second passivation layer has a low permeability for moisture or vapor relative to the ILD layer.

Abstract: An integrated circuit is disclosed. The integrated circuit is coupled to a circuit board. The circuit board includes several signal pair channels. The integrated circuit includes several output terminals and a control circuit. The control circuit is configured to configure several output signals output to several signal pair channels by several output terminals, so that a first signal pair channel and a second signal pair channel of several signal pair channels receive and output several output signals, so that a third signal pair channel of several signal pair channels shields an interference between the first signal pair channel and the second signal pair channel. The third signal pair channel is adjacent to the first signal pair channel and the second signal pair channel, and the third signal pair channel is located between the first signal pair channel and the second signal pair channel.

Abstract: A method of forming a semiconductor includes forming a first recess in a first semiconductor fin protruding from a substrate and forming a second recess in a second semiconductor fin protruding from the substrate first semiconductor fin and forming a source/drain region in the first recess and the second recess. Forming the source/drain region includes forming a first portion of a first layer in the first recess and forming a second portion of the first layer in the second recess, forming a second layer on the first layer by flowing a first precursor, and forming a third layer on the second layer by flowing a second precursor, the third layer being a single continuous material.

Abstract: The present disclosure provides a color filter array. The color filter array includes at least one minimal repeating unit, wherein the at least one minimal repeating unit includes a first filter set and a second filter set. The first filter set includes a first color filter having a first spectrum, two second color filters having a second spectrum and a third color filter having a third spectrum. The second filter set includes a fourth color filter having the first spectrum, two fifth color filters having the second spectrum, a sixth color filter having the third spectrum and a plurality of broadband filters. The second filter set is arranged to form a quadrilateral annulus, and the first filter set is positioned in an interior of the quadrilateral annulus. The present disclosure also provides a demosaicing method for an image captured via the color filter array.

Abstract: A light-emitting device includes a semiconductor epitaxial structure that has a first surface and a second surface opposite to the first surface, and that includes a first semiconductor layer, an active layer, and a second semiconductor layer sequentially disposed in such order in a direction from the first surface to the second surface. The active layer includes well layers and barrier layers that are alternately stacked. The active layer has an upper surface that is adjacent to the second semiconductor layer, and a lower surface that is opposite to the upper surface. The first semiconductor layer is doped with an n-type dopant, which has a first concentration of 5E17/cm3 at a first point in the first semiconductor layer. The first point of the first semiconductor layer and the lower surface of the active layer have a first distance therebetween. The first distance ranges from 150 nm to 500 nm.

Abstract: A light-emitting device includes: an epitaxial structure that has a first surface and a second surface; a first metal electrode that is disposed on the first surface, and that includes a main electrode and extending electrodes; current transmission blocks that are disposed on the second surface, and each having an electrode-facing sidewall and a non-electrode-facing sidewall; and a current blocking layer that is disposed in spaces among the current transmission blocks.

Abstract: A light-emitting diode includes an epitaxial structure and a first metal electrode. The epitaxial structure has a first surface and a second surface opposite thereto, and includes a first-type semiconductor layer, a light-emitting layer and a second-type semiconductor layer. The first-type semiconductor layer includes an ohmic contact layer which at least partially defines the first surface. The first metal electrode is disposed on the first surface, and includes a main electrode and auxiliary electrodes which are disposed on and electrically connected to the ohmic contact layer. The ohmic contact layer is made of AlxGayInP, where 0?x?1 or 0?y?1. In a top view of the light-emitting layer, a projection of each auxiliary electrode on the first surface is smaller than or equal to that of the ohmic contact layer on the first surface. A light-emitting divide including the light-emitting diode, and a method for manufacturing the light-emitting diode are also provided.

Abstract: Disclosed is a diamine compound represented by Formula (1), in which R1, R2, R3, R4, R5, X1, X2, X3, X4, m, n, a, b, c, and d are as defined herein. Also disclosed are a method for manufacturing the diamine compound, a composition including the diamine compound having a (chain alkoxy-methylene) phenyl group or a (hydroxyl-methylene) phenyl group, and a polymer including the (chain alkoxy-methylene) phenyl group or the (hydroxyl-methylene) phenyl group.

Abstract: A data processing circuit and a fault-mitigating method are provided. In the method, multiple sub-sequences are divided from sequence data. A first sub-sequence of the sub-sequences is accessed from a memory for a multiply-accumulate (MAC) operation to obtain a first computed result. The MAC operation is performed on a second sub-sequence of the sub-sequences in the memory to obtain a second computed result. The first and the second computed results are combined, where the combined result of the first and the second computed results is related to the result of the MAC operation on the sequence data directly. Accordingly, the error rate could be reduced, so as to mitigate fault.

Abstract: In particular embodiments, a computing system may capture a first image of a scene using a first camera of an artificial reality device. The system may capture a second image of the scene using a second camera and one or more optical elements of the artificial reality device. The second image may include an overlapping portion of multiple shifted copies of the scene. The system may generate an upsampled first image by applying a particular sampling technique to the first image. The system may generate a tiled image comprising a plurality of repeated second images by applying a tiling process to the second image. The system may generate an initial output image by processing the upsampled first image and the tiled image using a machine learning model. The system may generate a final output image by normalizing the initial output image using the upsampled first image.

Abstract: A light-emitting device includes an epitaxial structure having a first surface and a second surface that is opposite to the first surface. The epitaxial structure includes, along a first direction from the first surface to the surface, a first-type semiconductor layer, an active layer, and a second-type semiconductor layer including a capping layer. The capping layer includes at least Ni number of sub-layers arranged in the first direction, where N1?2. Each of the sub-layers of the capping layer contains a material represented by Aly1Ga1-y1InP, where 0<y1?1. The capping layer has an Al content which increases and then remains constant along the first direction. A light-emitting apparatus includes the light-emitting device is also provided.

Abstract: A device includes a first III-V compound layer, a second III-V compound layer, a dielectric layer, a contact, a metal-containing layer, and a metal contact. The second III-V compound layer is over the first III-V compound layer. The dielectric layer is over the second III-V compound layer. The contact extends through the dielectric layer to the second III-V compound layer. The contact is in contact with a top surface of the dielectric layer and an inner sidewall of the dielectric layer. The metal-containing layer is over and in contact with the contact, and a portion of the metal-containing layer is directly above the dielectric layer. The metal contact is over and in contact with the metal-containing layer.

Abstract: A semiconductor structure may include an interposer including on-interposer bump structures, at least one semiconductor die bonded to a first subset of the on-interposer bump structures through first solder material portions, at least one spacer die bonded to a second subset of the on-interposer bump structures through second solder material portions, and a molding compound die frame laterally surrounding each of the at least one semiconductor die and the at least one spacer die. Each of the at least one semiconductor die includes a respective set of transistors and a respective set of metal interconnect structures. Each of the at least one spacer die is free from any transistor therein.

Abstract: A semiconductor device package is provided, including a package substrate, a semiconductor device, a metal lid, and a metal thermal interface material (TIM). The package substrate has a first surface. The semiconductor device is disposed over the first surface of the package substrate. The metal lid is disposed over the semiconductor device and the package substrate. The metal TIM is interposed between the metal lid and the top surface of the semiconductor device for bonding the metal lid and the semiconductor device. A shape of the lateral sidewall of the metal TIM in a longitudinal section is concave arc, and the outermost point of the lateral sidewall is within the boundary of the semiconductor device.

Abstract: Package structures and methods of forming package structures are discussed. A package structure, in accordance with some embodiments, includes a large package component, such as a CoWoS, adhered to a large package substrate, such as a printed circuit board, an underfill material disposed between the large package component and the large package substrate, and a stress-release structure with high elongation values formed from photolithography encapsulated by the underfill material. The stress-release structure helping to reduce stress in the underfill material to reduce the risk of underfill cracking caused by the difference in coefficients of thermal expansion between the large package component and the large package substrate.

Abstract: Package structures and methods of forming package structures are discussed. A package structure, in accordance with some embodiments, includes a package component with one or more integrated circuits adhered to a package substrate, a hybrid thermal interface material utilizing a combination of polymer based material with high elongation values and metal based material with high thermal conductivity values. The polymer based thermal interface material placed on the edge of the package component contains the metal based thermal interface material in liquid form.

Abstract: An operating method of an under-display camera system includes: providing a raw data by a pixel array; generating, by a plurality of color filters respectively disposed on a plurality of first photodiodes of the pixel array, a color information in accordance with the raw data; generating, by a plurality of first narrowband filters respectively disposed on a plurality of second photodiodes of the pixel array, a first narrowband information in accordance with the raw data, wherein a spectrum linewidth of the plurality of first narrowband filters is in a range from 5 nm to 70 nm; reconstructing an edge information from the first narrowband information based on one of a plurality of diffraction patterns provided by a database unit of a point spread function; and obtaining an image by combining the edge information with the color information.

Abstract: In an embodiment, a method of forming an integrated circuit package includes: attaching a first carrier to a package component, the package component comprising: an interposer; a first semiconductor die attached to a first side of the interposer; a second semiconductor die attached to the first side of the interposer; an encapsulant encapsulating the first semiconductor die and the second semiconductor die; and conductive connectors attached to a second side of the interposer; attaching a second carrier to a package substrate, the package substrate comprising bond pads; bonding the conductive connectors of the package component to the bond pads of the package substrate by reflowing the conductive connectors while the first carrier is attached to the package component and while the second carrier is attached to the package substrate; removing the first carrier; and removing the second carrier.

Abstract: In an embodiment, a device includes: an integrated circuit die including a die connector; a first through via adjacent the integrated circuit die; an encapsulant encapsulating the first through via and the integrated circuit die; and a redistribution structure on the encapsulant, the redistribution structure including a redistribution line, the redistribution line physically and electrically coupled to the die connector of the integrated circuit die, the redistribution line electrically isolated from the first through via, the redistribution line crossing over the first through via.

Abstract: A capacitor structure and method of forming the capacitor structure is provided, including a providing a doped region of a substrate having a two-dimensional trench array with a plurality of segments defined therein. Each of the plurality of segments has an array of a plurality of recesses extending along the substrate, where the plurality of segments are rotationally symmetric about a center of the two-dimensional trench array. A first conducting layer is presented over the surface and a bottom and sidewalls of the recesses and is insulated from the substrate by a first dielectric layer. A second conducting layer is presented over the first conducting layer and is insulated by a second dielectric layer. First and second contacts respectively connect to an exposed top surface of the first conducting layer and second conducting layer. A third contact connects to the substrate within a local region to the capacitor structure.