Patents by Inventor An-Tai TSAI

An-Tai TSAI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240171159
    Abstract: A level shifter can achieve a level shift by a wide margin. The level shifter includes a latch circuit, a protection circuit, and an input circuit. The latch circuit is coupled between a high-voltage terminal and the protection circuit. The protection circuit including a first protection transistor pair and a second protection transistor pair is set between the latch circuit and the input circuit, and is configured to prevent an excessive voltage drop between the input circuit and a pair of output terminals, wherein the pair of output terminals is set between the first and the second protection transistor pairs and used for outputting a pair of output signals. The input circuit includes an input transistor pair coupled between the second protection transistor pair and a low-voltage terminal and configured to operate according to a pair of input signals.
    Type: Application
    Filed: February 2, 2024
    Publication date: May 23, 2024
    Inventors: CHIEN-HUI TSAI, Hung-Chen Chu, Yung-Tai Chen
  • Publication number: 20240155185
    Abstract: A channel hiatus correction method for an HDMI device is provided. A recovery code from scrambled data of the stream is obtained. A liner feedback shift register (LFSR) value of channels of the HDMI port is obtained based on the recovery code and the scrambled data of the stream. The stream is de-scrambled according to the LFSR value of the channels of the HDMI port. Video data is displayed according to the de-scrambled stream.
    Type: Application
    Filed: November 9, 2022
    Publication date: May 9, 2024
    Inventors: Chia-Hao CHANG, You-Tsai JENG, Kai-Wen YEH, Yi-Cheng CHEN, Te-Chuan WANG, Kai-Wen CHENG, Chin-Lung LIN, Tai-Lai TUNG, Ko-Yin LAI
  • Patent number: 11979130
    Abstract: A transmitter circuit is provided. The transmitter circuit has a first transmission node and a second transmission node and includes a first resistor, a second resistor, a third resistor, a fourth resistor, and a driving circuit. The driving circuit includes a first transistor group, a second transistor group, a third transistor group, and a fourth transistor group. The first resistor is coupled between a first output terminal and the first transmission node. The second resistor is coupled between a second output terminal and the second transmission node. The third resistor is coupled between a third output terminal and the first transmission node. The fourth resistor is coupled between a fourth output terminal and the second transmission node. The first, second, third, and fourth transistor groups are coupled to a first and a second reference voltages and electrically connected to the first, second, third, and fourth output terminals, respectively.
    Type: Grant
    Filed: March 1, 2023
    Date of Patent: May 7, 2024
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventors: Hung-Chen Chu, Chien-Hui Tsai, Yung-Tai Chen
  • Patent number: 11962847
    Abstract: A channel hiatus correction method for an HDMI device is provided. A recovery code from scrambled data of the stream is obtained. A liner feedback shift register (LFSR) value of channels of the HDMI port is obtained based on the recovery code and the scrambled data of the stream. The stream is de-scrambled according to the LFSR value of the channels of the HDMI port. Video data is displayed according to the de-scrambled stream.
    Type: Grant
    Filed: November 9, 2022
    Date of Patent: April 16, 2024
    Assignee: MEDIATEK INC.
    Inventors: Chia-Hao Chang, You-Tsai Jeng, Kai-Wen Yeh, Yi-Cheng Chen, Te-Chuan Wang, Kai-Wen Cheng, Chin-Lung Lin, Tai-Lai Tung, Ko-Yin Lai
  • Publication number: 20240107608
    Abstract: In an aspect of the disclosure, a method, a computer-readable medium, and an apparatus are provided. The apparatus may be a UE. In certain configurations, the UE enters a first radio resource control (RRC) connection with a first base station of a first network. The UE receives, from the first base station, an indication that enables the UE to send a first request for deactivating or releasing resources used for communications with the first base station. In response to a determination to enter a second RRC connection with a second base station of a second network, the UE sends, to the first base station, the first request for deactivating or releasing the resources. The UE enters the second RRC connection with the second base station while maintaining the first RRC connection with the first base station.
    Type: Application
    Filed: September 15, 2023
    Publication date: March 28, 2024
    Inventors: Chun-Fan Tsai, Kun-Lin Wu, Mu-Tai Lin
  • Patent number: 11942399
    Abstract: A semiconductor device includes a plurality of functional blocks, each being configured to provide at least one predetermined function. The functional blocks at least include a first functional block and a second functional block. The first functional block and the second functional block are coupled in serial with a predetermined current flowing therethrough.
    Type: Grant
    Filed: January 18, 2023
    Date of Patent: March 26, 2024
    Assignee: MEDIATEK INC.
    Inventors: Yi-Tao Tsai, Yun-Tai Hsiao
  • Publication number: 20240088206
    Abstract: A semiconductor structure includes a first electrode, a second electrode over the first electrode, a third electrode over the second electrode, a first insulating layer between the first electrode and the second electrode, and a second insulating layer between the second electrode and the third electrode. The third electrode includes a first bottom surface and a second bottom surface. The first bottom surface and the second bottom surface are at different levels. A width of the first bottom surface is greater than a width of the second bottom surface.
    Type: Application
    Filed: November 20, 2023
    Publication date: March 14, 2024
    Inventors: YI JEN TSAI, YUAN-TAI TSENG, CHERN-YOW HSU
  • Patent number: 11929747
    Abstract: A level shifter can achieve a level shift by a wide margin. The level shifter includes a latch circuit, a clamping circuit, a protection circuit, and an input circuit. The latch circuit is coupled between a high-voltage terminal and a pair of output terminals for outputting a pair of output signals. The clamping circuit is coupled between a medium-voltage terminal and the pair of output terminals and limits the minimum voltage of the pair of output signals to the medium voltage. The protection circuit is set between the latch circuit and the input circuit, and prevents an excessive voltage drop between the input circuit and the pair of output terminals. The input circuit includes an input transistor pair coupled between the protection circuit and a low-voltage terminal having a low voltage. The input transistor pair receives a pair of input signals and operates accordingly.
    Type: Grant
    Filed: April 25, 2022
    Date of Patent: March 12, 2024
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventors: Chien-Hui Tsai, Hung-Chen Chu, Yung-Tai Chen
  • Patent number: 11927312
    Abstract: The disclosure provides an electronic device, including a circuit board, multiple semiconductor components, a first light reflecting structure, and a second light reflecting structure. The circuit board includes a substrate, and the substrate may have a first surface and at least one side surface. The multiple semiconductor components are disposed on the first surface. The first light reflecting structure is disposed on the first surface. The second light reflecting structure is disposed on the first surface and the at least one side surface.
    Type: Grant
    Filed: April 18, 2022
    Date of Patent: March 12, 2024
    Assignee: Innolux Corporation
    Inventors: Chin-Chia Huang, Chieh-Ying Chen, Jia-Huei Lin, Chin-Tai Hsu, Tzu-Chien Huang, Fu-Sheng Tsai
  • Patent number: 11848750
    Abstract: Various schemes for mitigating radio frequency (RF) interference are described, wherein an adaptive local oscillator (LO) is utilized. A receiver measures a jamming indicator which indicates a total power within a receiving band of the receiver. If the jamming indicator indicates a presence of substantial in-band interference, the receiver may program the LO to a different frequency and/or adjust a bandwidth of a filter accordingly to reject or reduce the interference. The receiver may adjust the LO and/or the filter repeatedly until the interference is rejected to a point that de-sense to the signal intended to be received is satisfactorily mitigated. The receiver may restore the LO and the filter to a default setting when the jamming indicator indicates that the interference is no longer present.
    Type: Grant
    Filed: August 21, 2022
    Date of Patent: December 19, 2023
    Inventor: Yu-Tai Tsai
  • Publication number: 20230291494
    Abstract: Various schemes for mitigating radio frequency (RF) interference are described, wherein an adaptive local oscillator (LO) is utilized. A receiver measures a jamming indicator which indicates a total power within a receiving band of the receiver. If the jamming indicator indicates a presence of substantial in-band interference, the receiver may program the LO to a different frequency and/or adjust a bandwidth of a filter accordingly to reject or reduce the interference. The receiver may adjust the LO and/or the filter repeatedly until the interference is rejected to a point that de-sense to the signal intended to be received is satisfactorily mitigated. The receiver may restore the LO and the filter to a default setting when the jamming indicator indicates that the interference is no longer present.
    Type: Application
    Filed: August 21, 2022
    Publication date: September 14, 2023
    Inventor: Yu-Tai Tsai
  • Publication number: 20230111546
    Abstract: An image processing device includes a three-dimensional noise reduction (3D NR) circuit, an artificial intelligence noise reduction (AI NR) circuit, a weight determination circuit and an image blending circuit. The 3D NR circuit performs a 3D NR operation on input image data to generate first image data. The AI NR circuit performs an AI NR operation on the input image data to generate second image data. The weight determination circuit outputs a blending weight according to a motion index. The image blending circuit blends the first image data and the second image data according to the blending weight to generate output image data.
    Type: Application
    Filed: March 30, 2022
    Publication date: April 13, 2023
    Inventors: Hsiu-Wei HO, Chien-Yuan TSENG, Ho-Tai TSAI
  • Patent number: 11573628
    Abstract: A smart mat includes a stepping potential generation unit, a computing processor and a transmission processor for sensing the stepping direction of a stepper to control the operation of a device. The stepping potential generation unit includes an upper mat, an isolating airgap layer, a lower mat and at least one high-resistance strips. When the stepper stands on the smart mat to press the stepping potential generation unit, a part of the stepping potential generation unit is pressed by an open-circuit state to form a closed circuit and generate a potential. The computing processor uses the distributed position of each potential and the time sequence of distributing each potential to compute and analyse a potential stepping process distribution area to obtain a stepping direction, so as to control the operation of the device through the transmission processor.
    Type: Grant
    Filed: August 27, 2021
    Date of Patent: February 7, 2023
    Assignee: CERADEX CORPORATION
    Inventors: Chen-Yuan Su, Liang-Tai Tsai, Wei-Lun Huang
  • Patent number: 11526203
    Abstract: A method for switching a power mode of a computer device is adapted to a computer accessory. The method comprises setting a power management mode of the computer device to be awakened when connected to the external power; connecting the computer accessory to a host connector of the computer device to establish a power connection and a communication connection through a host signal pin set of the host connector; through the power connection and the communication connection, detecting and determining the power mode of the computer device; and executing one of following steps upon receiving the switch signal: when the power mode is the normal operation state, transmitting a communication signal; when the power mode is the Suspend-To-RAM state, transmitting a wake up signal; and when the power mode is the Suspend-To-Disk state or the shutdown state, temporarily cutting off the external power and then restoring the external power.
    Type: Grant
    Filed: May 27, 2021
    Date of Patent: December 13, 2022
    Assignee: LUXSHARE-ICT CO., LTD.
    Inventors: Sean P. O'Neal, Erh-Tai Tsai, Quan-Fei Ning, Chih-Hsiung Chang, Ya-Ling Huang
  • Patent number: 11452158
    Abstract: A dual-network dual-system mobile device is provided in the disclosure. The mobile device includes a mobile network module, a transfer station module, two computer modules, a switch module, a human-machine interface (HMI), and a casing. The HMI is configured to interact with one computer module and to receive a real-time notification from another computer module. The transfer station module respectively establishes two network channels with two access points through the mobile network module and mobile network. The two network channels are isolated virtually from each other.
    Type: Grant
    Filed: July 21, 2021
    Date of Patent: September 20, 2022
    Inventor: An-Tai Tsai
  • Patent number: 11418207
    Abstract: An analog-to-digital converter (ADC) device equipped with a conversion suspension function and an associated operation method thereof are provided. The ADC device includes: an interleaved clock controller, arranged to generate a first clock signal and a second clock signal according to a master clock signal; and a multi-ADC circuit, coupled to the interleaved clock controller, arranged to perform analog-to-digital conversion. The multi-ADC circuit includes a first ADC and a second ADC, wherein the first ADC performs sampling and conversion operations according to the first clock signal, and the second ADC performs sampling and conversion operations according to the second clock signal. Based on the timing control of the first clock signal and the second clock signal, when any ADC of the first ADC and the second ADC is performing a sampling operation, the other ADC of the first ADC and the second ADC suspends conversion.
    Type: Grant
    Filed: June 23, 2021
    Date of Patent: August 16, 2022
    Assignees: Artery Technology Co., Ltd., FARADAY TECHNOLOGY CORPORATION
    Inventors: Zhengxiang Wang, Feng Xu, Wei-Tai Tsai, Chiao-Wen Lo
  • Publication number: 20220236784
    Abstract: A method for switching a power mode of a computer device is adapted to a computer accessory. The method comprises setting a power management mode of the computer device to be awakened when connected to the external power; connecting the computer accessory to a host connector of the computer device to establish a power connection and a communication connection through a host signal pin set of the host connector; through the power connection and the communication connection, detecting and determining the power mode of the computer device; and executing one of following steps upon receiving the switch signal: when the power mode is the normal operation state, transmitting a communication signal; when the power mode is the Suspend-To-RAM state, transmitting a wake up signal; and when the power mode is the Suspend-To-Disk state or the shutdown state, temporarily cutting off the external power and then restoring the external power.
    Type: Application
    Filed: May 27, 2021
    Publication date: July 28, 2022
    Applicant: LUXSHARE-ICT CO., LTD.
    Inventors: Sean P. O'Neal, Erh-Tai Tsai, Quan-Fei Ning, Chih-Hsiung Chang, Ya-Ling Huang
  • Publication number: 20220075446
    Abstract: A smart mat includes a stepping potential generation unit, a computing processor and a transmission processor for sensing the stepping direction of a stepper to control the operation of a device. The stepping potential generation unit includes an upper mat, an isolating airgap layer, a lower mat and at least one high-resistance strips. When the stepper stands on the smart mat to press the stepping potential generation unit, a part of the stepping potential generation unit is pressed by an open-circuit state to form a closed circuit and generate a potential. The computing processor uses the distributed position of each potential and the time sequence of distributing each potential to compute and analyse a potential stepping process distribution area to obtain a stepping direction, so as to control the operation of the device through the transmission processor.
    Type: Application
    Filed: August 27, 2021
    Publication date: March 10, 2022
    Inventors: CHEN-YUAN SU, LIANG-TAI TSAI, WEI-LUN HUANG
  • Publication number: 20220030651
    Abstract: A dual-network dual-system mobile device is provided in the disclosure. The mobile device includes a mobile network module, a transfer station module, two computer modules, a switch module, a human-machine interface (HMI), and a casing. The HMI is configured to interact with one computer module and to receive a real-time notification from another computer module. The transfer station module respectively establishes two network channels with two access points through the mobile network module and mobile network. The two network channels are isolated virtually from each other.
    Type: Application
    Filed: July 21, 2021
    Publication date: January 27, 2022
    Inventor: An-Tai TSAI
  • Publication number: 20210149471
    Abstract: A method for waking up a notebook computer is adapted to a computer accessory. The notebook computer includes a host connector including a power receiving. The method includes setting a power management mode of the notebook computer to be awakened when connected to the external power, to switch a power state of the notebook computer from a waiting to be awakened state to a normal operation state; connecting the computer accessory to the host connector to establish a power connection through the power receiving pin and deliver an external power to the notebook computer; temporarily cutting off the external power by the computer accessory and then restoring the external power; when the power state of the notebook computer is the waiting to be awakened state, performing a wake-up operation with the notebook computer to switch to the power state to be the normal operation.
    Type: Application
    Filed: January 27, 2021
    Publication date: May 20, 2021
    Applicant: LUXSHARE-ICT CO., LTD.
    Inventors: Sean P. O'Neal, Erh-Tai Tsai, Quan-Fei Ning, Chih-Hsiung Chang, Ya-Ling Huang