Patents by Inventor Ananthakrishnan Viswanathan
Ananthakrishnan Viswanathan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11201547Abstract: A switching converter is provided that includes a power MOSFET, a controller having a drive pin connected to a gate terminal of the power MOSFET, and a resistor connected to the gate terminal. A compensation time selection circuit is included that has compensation times stored therein. A compensation time is selected from the compensation times based on a value of the resistor and stored in the controller. The selected compensation time compensates for an inherent delay in switching the power MOSFET to an ON state after the power MOSFET receives a signal to switch to the ON state to allow the power MOSFET to switch to the ON state when a drain voltage of the power MOSFET's reaches its lowest value during a switching cycle.Type: GrantFiled: May 9, 2019Date of Patent: December 14, 2021Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Philomena Cleopha Brady, Ananthakrishnan Viswanathan, Shanguang Xu
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Patent number: 10756620Abstract: A power factor correction circuit includes a power transistor, an inductor, and detection circuitry. The inductor is coupled to a drain terminal of the power transistor. The detection circuitry is coupled to the drain terminal of the power transistor. The detection circuitry is configured to determine an input voltage applied to the inductor based on resonant ringing of voltage at the drain terminal, and to detect a valley in the voltage at the drain terminal based on the input voltage applied to the inductor.Type: GrantFiled: July 30, 2019Date of Patent: August 25, 2020Assignee: Texas Instruments IncorporatedInventors: Ananthakrishnan Viswanathan, Salvatore Giombanco, Joseph Michael Leisten, Philomena Cleopha Brady
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Patent number: 10673322Abstract: A power factor correction controller zero current detection circuit includes a differentiator circuit, a comparator, a first qualification timer circuit, an idle ringing detector circuit, a second qualification timer circuit, and a flip-flop. The comparator is coupled to the differentiator circuit. The first qualification timer circuit includes an input coupled to an output of the comparator. The idle ringing detector circuit includes a first input coupled to the output of the comparator, and a second input coupled to an output of the first qualification timer circuit. The second qualification timer circuit includes a first input coupled to the output of the first qualification timer circuit, and a second input coupled an output of the idle ringing detector circuit. The flip-flop includes a first input coupled to the output of the comparator, and a second input coupled to an output of the second qualification timer circuit.Type: GrantFiled: August 19, 2019Date of Patent: June 2, 2020Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Salvatore Giombanco, Ananthakrishnan Viswanathan, William James Long
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Publication number: 20190356219Abstract: A power factor correction circuit includes a power transistor, an inductor, and detection circuitry. The inductor is coupled to a drain terminal of the power transistor. The detection circuitry is coupled to the drain terminal of the power transistor. The detection circuitry is configured to determine an input voltage applied to the inductor based on resonant ringing of voltage at the drain terminal, and to detect a valley in the voltage at the drain terminal based on the input voltage applied to the inductor.Type: ApplicationFiled: July 30, 2019Publication date: November 21, 2019Inventors: Ananthakrishnan Viswanathan, Salvatore Giombanco, Joseph Michael Leisten, Philomena Cleopha Brady
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Patent number: 10411592Abstract: A power factor correction circuit includes a power transistor, an inductor, and detection circuitry. The inductor is coupled to a drain terminal of the power transistor. The detection circuitry is coupled to the drain terminal of the power transistor. The detection circuitry is configured to determine an input voltage applied to the inductor based on resonant ringing of voltage at the drain terminal, and to detect a valley in the voltage at the drain terminal based on the input voltage applied to the inductor.Type: GrantFiled: December 26, 2017Date of Patent: September 10, 2019Assignee: Texas Instruments IncorporatedInventors: Ananthakrishnan Viswanathan, Salvatore Giombanco, Joseph Michael Leisten, Philomena Cleopha Brady
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Publication number: 20190267903Abstract: A switching converter is provided that includes a power MOSFET, a controller having a drive pin connected to a gate terminal of the power MOSFET, and a resistor connected to the gate terminal. A compensation time selection circuit is included that has compensation times stored therein. A compensation time is selected from the compensation times based on a value of the resistor and stored in the controller. The selected compensation time compensates for an inherent delay in switching the power MOSFET to an ON state after the power MOSFET receives a signal to switch to the ON state to allow the power MOSFET to switch to the ON state when a drain voltage of the power MOSFET's reaches its lowest value during a switching cycle.Type: ApplicationFiled: May 9, 2019Publication date: August 29, 2019Inventors: Philomena Cleopha Brady, Ananthakrishnan Viswanathan, Shanguang Xu
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Publication number: 20190207521Abstract: A switching converter is provided that includes a power MOSFET, a controller having a drive pin connected to a gate terminal of the power MOSFET, and a resistor connected to the gate terminal. A compensation time selection circuit is included that has compensation times stored therein. A compensation time is selected from the compensation times based on a value of the resistor and stored in the controller. The selected compensation time compensates for an inherent delay in switching the power MOSFET to an ON state after the power MOSFET receives a signal to switch to the ON state to allow the power MOSFET to switch to the ON state when a drain voltage of the power MOSFET's reaches its lowest value during a switching cycle.Type: ApplicationFiled: January 18, 2018Publication date: July 4, 2019Inventors: PHILOMENA CLEOPHA BRADY, ANANTHAKRISHNAN VISWANATHAN, SHANGUANG XU
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Publication number: 20190199203Abstract: A power factor correction circuit includes a power transistor, an inductor, and detection circuitry. The inductor is coupled to a drain terminal of the power transistor. The detection circuitry is coupled to the drain terminal of the power transistor. The detection circuitry is configured to determine an input voltage applied to the inductor based on resonant ringing of voltage at the drain terminal, and to detect a valley in the voltage at the drain terminal based on the input voltage applied to the inductor.Type: ApplicationFiled: December 26, 2017Publication date: June 27, 2019Inventors: Ananthakrishnan VISWANATHAN, Salvatore GIOMBANCO, Joseph Michael LEISTEN, Philomena Cleopha BRADY
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Patent number: 10326373Abstract: A switching converter is provided that includes a power MOSFET, a controller having a drive pin connected to a gate terminal of the power MOSFET, and a resistor connected to the gate terminal. A compensation time selection circuit is included that has compensation times stored therein. A compensation time is selected from the compensation times based on a value of the resistor and stored in the controller. The selected compensation time compensates for an inherent delay in switching the power MOSFET to an ON state after the power MOSFET receives a signal to switch to the ON state to allow the power MOSFET to switch to the ON state when a drain voltage of the power MOSFET's reaches its lowest value during a switching cycle.Type: GrantFiled: January 18, 2018Date of Patent: June 18, 2019Assignee: Texas Instruments IncorporatedInventors: Philomena Cleopha Brady, Ananthakrishnan Viswanathan, Shanguang Xu
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Patent number: 10284077Abstract: A Power Factor Correction (PFC) controller includes an error amplifier for amplifying a difference between Vout and intended Vout to provide a power demand (Pdem) output at a compensation pin. A burst mode controller includes soft-start circuitry coupled to receive Pdem and to a drive pin which provides pulses to a control node of a power switch of a DC-DC converter during burst periods. The pulses slow ramping of line current over a first 2 to 36 switching cycles at a beginning of bursts when energizing the inductor to reduce a line current slope as compared to without ramping up, and for slowing ramping down of line current over the last 2 to 36 switching cycles to reduce a line current slope when de-energizing the inductor as compared to a line current without ramping down. The PFC controller does not utilize zero-crossings of the line voltage for burst period synchronization.Type: GrantFiled: October 17, 2017Date of Patent: May 7, 2019Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Joseph Michael Leisten, Ananthakrishnan Viswanathan, Philomena Cleopha Brady, Brent Alan McDonald
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Publication number: 20190115826Abstract: A Power Factor Correction (PFC) controller includes an error amplifier for amplifying a difference between Vout and intended Vout to provide a power demand (Pdem) output at a compensation pin. A burst mode controller includes soft-start circuitry coupled to receive Pdem and to a drive pin which provides pulses to a control node of a power switch of a DC-DC converter during burst periods. The pulses slow ramping of line current over a first 2 to 36 switching cycles at a beginning of bursts when energizing the inductor to reduce a line current slope as compared to without ramping up, and for slowing ramping down of line current over the last 2 to 36 switching cycles to reduce a line current slope when de-energizing the inductor as compared to a line current without ramping down. The PFC controller does not utilize zero-crossings of the line voltage for burst period synchronization.Type: ApplicationFiled: October 17, 2017Publication date: April 18, 2019Inventors: JOSEPH MICHAEL LEISTEN, ANANTHAKRISHNAN VISWANATHAN, PHILOMENA CLEOPHA BRADY, BRENT ALAN MCDONALD
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Patent number: 10186964Abstract: At least some aspects of the present disclosure provide for a circuit. In one example, the circuit includes a logic circuit having multiple inputs and multiple outputs, a calculated discontinuous conduction (DCM) (TDCM) timer having an input coupled to one of the logic circuit outputs and an output coupled to one of the logic circuit inputs, an on-time (TON) timer having an input coupled to one of the logic circuit outputs and an output coupled to one of the logic circuit inputs, and a hysteresis timer having an input coupled to one of the logic circuit outputs and multiple outputs coupled to multiple of the logic circuit inputs.Type: GrantFiled: April 2, 2018Date of Patent: January 22, 2019Assignee: Texas Instruments IncorporatedInventors: Michael Ryan Hanschke, Salvatore Giombanco, John C. Vogt, Filippo Marino, Joseph Michael Leisten, Ananthakrishnan Viswanathan
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Patent number: 10128744Abstract: Disclosed examples include methods and control circuits to operate a single or multi-phase DC-DC converter, including an output that turns a first switch on for a controlled on time and then turns the switch off for a controlled off time in successive control cycles, as well as a PWM circuit that computes a threshold time value corresponding to a predetermined peak inductor current and a duty cycle value, and computes a first time value according to an error value for a subsequent second switching control cycle. The PWM circuit sets the on time to the first time value to operate in a critical conduction mode for the second switching control cycle when the first time value is greater than or equal to the threshold time value, and otherwise sets the controlled on time to the threshold time value for discontinuous conduction mode operation in the second control cycle.Type: GrantFiled: December 13, 2017Date of Patent: November 13, 2018Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Ananthakrishnan Viswanathan, Joseph Michael Leisten, Brent McDonald, Philomena Cleopha Brady
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Patent number: 10051701Abstract: In accordance with the present disclosure, a control circuit may be employed for controlling delivery of energy from an input of a lamp assembly to a load of the lamp assembly. The control circuit may transfer a first amount of energy from an input to a load (e.g., comprising one or more light-emitting diodes) to cause the load to generate light external to the lamp assembly in accordance with a control setting of a dimmer indicating a user-desired amount of energy to be transferred to the load. The control circuit may also transfer a second amount of energy from the input to a second load to cause the second load (e.g., comprising one or more lower-efficacy light-emitting diodes) to dissipate the second amount of energy external to the lamp assembly, wherein the second amount of energy comprises energy present in the input signal other than the first amount of energy.Type: GrantFiled: July 16, 2014Date of Patent: August 14, 2018Assignee: PHILIPS LIGHTING HOLDING B.V.Inventors: Jonathan Williams, Ananthakrishnan Viswanathan, John L. Melanson, August Laible
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Publication number: 20180069471Abstract: A power factor correction (PFC) pre-converter includes a boost converter and a PFC controller. The boost converter is configured to step up a boost converter input voltage by generating a boost converter output voltage. The boost converter includes an inductor, a switch, and a diode. The PFC controller is configured to control the switch by generating a signal causing the switch to be closed for a first period of time. The first period of time ends when current through the inductor reaches a target current value. The PFC controller is also configured to control the switch by, in response to the first period of time ending, generating a signal causing the switch to be open for a second period of time. The second period of time is based on a ratio between the first period of time and a critical conduction mode on time.Type: ApplicationFiled: September 6, 2016Publication date: March 8, 2018Inventors: Joseph Michael LEISTEN, Ananthakrishnan VISWANATHAN, Brent McDONALD, Philomena Cleopha BRADY
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Publication number: 20160021714Abstract: In accordance with the present disclosure, a control circuit may be employed for controlling delivery of energy from an input of a lamp assembly to a load of the lamp assembly. The control circuit may transfer a first amount of energy from an input to a load (e.g., comprising one or more light-emitting diodes) to cause the load to generate light external to the lamp assembly in accordance with a control setting of a dimmer indicating a user-desired amount of energy to be transferred to the load. The control circuit may also transfer a second amount of energy from the input to a second load to cause the second load (e.g., comprising one or more lower-efficacy light-emitting diodes) to dissipate the second amount of energy external to the lamp assembly, wherein the second amount of energy comprises energy present in the input signal other than the first amount of energy.Type: ApplicationFiled: July 16, 2014Publication date: January 21, 2016Inventors: Jonathan Williams, Ananthakrishnan Viswanathan, John L. Melanson, August Laible