Patents by Inventor Ananthasayanam Chellappa

Ananthasayanam Chellappa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9906127
    Abstract: Various circuits, apparatuses and methods are disclosed for generating a DC voltage conversion. In an example embodiment, an apparatus includes a DC voltage multiplier having a first capacitor. In a first mode, the first capacitor is charged to store a first voltage between first and second terminals of the capacitor. In a second mode, the DC voltage multiplier shifts a voltage of the second terminal up to a second voltage, thereby shifting the first terminal to a third voltage. The apparatus also includes a fractional output control circuit that when enabled, connects a second capacitor between the first terminal of the first capacitor and the ground reference voltage. The connecting of the second capacitor causes the first terminal of the first capacitor to be pulled down to a voltage between the first and third voltages when the second terminal is shifted up to the second voltage.
    Type: Grant
    Filed: September 26, 2014
    Date of Patent: February 27, 2018
    Assignee: NXP B.V.
    Inventor: Ananthasayanam Chellappa
  • Patent number: 9817426
    Abstract: Embodiments of voltage regulators and methods for operating a voltage regulator are described. In one embodiment, a voltage regulator includes a set of current mirror circuits configured to convert an input voltage into an output voltage and a voltage buffer circuit configured to buffer a reference voltage for the set of current mirror circuits. The set of current mirror circuits form a positive feedback loop. Other embodiments are also described.
    Type: Grant
    Filed: November 5, 2014
    Date of Patent: November 14, 2017
    Assignee: NXP B.V.
    Inventor: Ananthasayanam Chellappa
  • Patent number: 9753471
    Abstract: Various circuits and methods are disclosed for generating a regulated voltage. According to an example embodiment, an apparatus includes a voltage regulation circuit including a transistor having a channel between source and drain nodes and a gate for affecting current passing through the channel. The voltage regulation circuit configured and arranged to generate, from a voltage source, a regulated voltage at an output node. The voltage regulation circuit exhibits a transfer function having a pole-frequency that varies in response to changes in the current passed by the transistor. The apparatus also includes a current control circuit connected to the voltage regulation circuit, and configured to adjust current provided to the output node to maintain a relatively constant current through the transistor.
    Type: Grant
    Filed: September 26, 2014
    Date of Patent: September 5, 2017
    Assignee: NXP B.V.
    Inventor: Ananthasayanam Chellappa
  • Patent number: 9519298
    Abstract: Aspects of the present disclosure are directed to methods, apparatuses and systems involving a multi junction semiconductor circuit. According to an example embodiment, an apparatus includes a multi junction semiconductor circuit including a first current path and a second current path, each current path having respective first and second common voltage nodes to provide an output that is proportional to absolute temperature. The first current path includes a first p-n junction exhibiting a first current density. The second current path includes a second p-n junction exhibiting a second current density that is proportionally different than the first current density, and a resistor connected between the second p-n junction and the second common voltage node. Further, the apparatus includes a current-tap path connected to a node between the resistor and the second p-n junction, the current-tap path diverts a portion of current that flows through the resistor away from the second p-n junction.
    Type: Grant
    Filed: March 20, 2015
    Date of Patent: December 13, 2016
    Assignee: NXP B.V.
    Inventor: Ananthasayanam Chellappa
  • Publication number: 20160274604
    Abstract: Aspects of the present disclosure are directed to methods, apparatuses and systems involving a multi junction semiconductor circuit. According to an example embodiment, an apparatus includes a multi junction semiconductor circuit including a first current path and a second current path, each current path having respective first and second common voltage nodes to provide an output that is proportional to absolute temperature. The first current path includes a first p-n junction exhibiting a first current density. The second current path includes a second p-n junction exhibiting a second current density that is proportionally different than the first current density, and a resistor connected between the second p-n junction and the second common voltage node. Further, the apparatus includes a current-tap path connected to a node between the resistor and the second p-n junction, the current-tap path diverts a portion of current that flows through the resistor away from the second p-n junction.
    Type: Application
    Filed: March 20, 2015
    Publication date: September 22, 2016
    Inventor: Ananthasayanam Chellappa
  • Publication number: 20160124454
    Abstract: Embodiments of voltage regulators and methods for operating a voltage regulator are described. In one embodiment, a voltage regulator includes a set of current mirror circuits configured to convert an input voltage into an output voltage and a voltage buffer circuit configured to buffer a reference voltage for the set of current mirror circuits. The set of current mirror circuits form a positive feedback loop. Other embodiments are also described.
    Type: Application
    Filed: November 5, 2014
    Publication date: May 5, 2016
    Applicant: NXP B.V.
    Inventor: Ananthasayanam Chellappa
  • Publication number: 20160091906
    Abstract: Various circuits and methods are disclosed for generating a regulated voltage. According to an example embodiment, an apparatus includes a voltage regulation circuit including a transistor having a channel between source and drain nodes and a gate for affecting current passing through the channel. The voltage regulation circuit configured and arranged to generate, from a voltage source, a regulated voltage at an output node. The voltage regulation circuit exhibits a transfer function having a pole-frequency that varies in response to changes in the current passed by the transistor. The apparatus also includes a current control circuit connected to the voltage regulation circuit, and configured to adjust current provided to the output node to maintain a relatively constant current through the transistor.
    Type: Application
    Filed: September 26, 2014
    Publication date: March 31, 2016
    Inventor: Ananthasayanam Chellappa
  • Publication number: 20160094123
    Abstract: Various circuits, apparatuses and methods are disclosed for generating a DC voltage conversion. In an example embodiment, an apparatus includes a DC voltage multiplier having a first capacitor. In a first mode, the first capacitor is charged to store a first voltage between first and second terminals of the capacitor. In a second mode, the DC voltage multiplier shifts a voltage of the second terminal up to a second voltage, thereby shifting the first terminal to a third voltage. The apparatus also includes a fractional output control circuit that when enabled, connects a second capacitor between the first terminal of the first capacitor and the ground reference voltage. The connecting of the second capacitor causes the first terminal of the first capacitor to be pulled down to a voltage between the first and third voltages when the second terminal is shifted up to the second voltage.
    Type: Application
    Filed: September 26, 2014
    Publication date: March 31, 2016
    Inventor: Ananthasayanam Chellappa
  • Patent number: 7920015
    Abstract: In a traditional, fully-isolated bandgap reference circuits, it was difficult to detect currents that are proportional to absolute temperature (PTAT). Here, a PTAT reference in a fully isolated NPN-based bandgap references are disclosed. These circuits in particular are able to make detections using various current without the need for stand-along operational amplifiers.
    Type: Grant
    Filed: October 31, 2007
    Date of Patent: April 5, 2011
    Assignee: Texas Instruments Incorporated
    Inventor: Ananthasayanam Chellappa
  • Patent number: 7843254
    Abstract: Generating a bandgap reference by generating a first current in a first circuit and a second current in a second circuit, a control circuit forcing the first and second currents to have a first magnitude proportional-to-temperature. Generating a third current in a third circuit having a second magnitude based on a first voltage associated with the first circuit, the second magnitude being complementary-to-temperature. Adding the first and second magnitudes in a fourth circuit to form a third magnitude substantially constant over change in temperature, the fourth circuit generating a fourth current having the third magnitude. Adding the first and second magnitudes to generate a fifth current having the first magnitude in a fifth circuit and a sixth current having the second magnitude in a sixth circuit, the fifth and sixth circuits sinking current from the fourth circuit.
    Type: Grant
    Filed: October 31, 2007
    Date of Patent: November 30, 2010
    Assignee: Texas Instruments Incorporated
    Inventor: Ananthasayanam Chellappa
  • Patent number: 7821307
    Abstract: In an apparatus for monitoring a supply voltage, a current mirror coupled to the supply voltage provides a pair of matching currents. A resistor divider that includes a first resistor coupled in series with a second resistor to from a first node is disposed between the supply voltage and a voltage reference. A pair of transistors that have their bases coupled to the first node are coupled to receive a corresponding one of the pair of matching currents. A collector of a first transistor of the pair of transistors provides an output voltage in response to the supply voltage. A third resistor is disposed between an emitter of a second transistor of the pair of transistors and the voltage reference. A base and a collector of a third transistor are coupled to the first node and an emitter is coupled to the voltage reference.
    Type: Grant
    Filed: December 23, 2008
    Date of Patent: October 26, 2010
    Assignee: Texas Instruments Incorporated
    Inventor: Ananthasayanam Chellappa
  • Patent number: 7780346
    Abstract: Methods and apparatus for a fully isolated NPN-based temperature detector are disclosed. A disclosed method to determine the temperature of a circuit comprises generating a first current that increases as temperature increases, generating a second current that decreases as temperature increases, and detecting the temperature by receiving a first and second signal based on the first and second currents to determine whether the temperature exceeds at least one temperature threshold.
    Type: Grant
    Filed: October 31, 2007
    Date of Patent: August 24, 2010
    Assignee: Texas Instruments Incorporated
    Inventor: Ananthasayanam Chellappa
  • Publication number: 20100156477
    Abstract: In an apparatus for monitoring a supply voltage, a current mirror coupled to the supply voltage provides a pair of matching currents. A resistor divider that includes a first resistor coupled in series with a second resistor to from a first node is disposed between the supply voltage and a voltage reference. A pair of transistors that have their bases coupled to the first node are coupled to receive a corresponding one of the pair of matching currents. A collector of a first transistor of the pair of transistors provides an output voltage in response to the supply voltage. A third resistor is disposed between an emitter of a second transistor of the pair of transistors and the voltage reference. A base and a collector of a third transistor are coupled to the first node and an emitter is coupled to the voltage reference.
    Type: Application
    Filed: December 23, 2008
    Publication date: June 24, 2010
    Inventor: ANANTHASAYANAM CHELLAPPA
  • Publication number: 20100148857
    Abstract: Methods and apparatus for low-voltage bias current and bias voltage generation are disclosed. An example bias signal generation circuit disclosed herein comprises a first amplifier stage, an output amplifier stage electrically coupled with the first amplifier stage, the first amplifier stage and the output amplifier stage configured to generate an output bias signal, the output amplifier stage configured to provide the output bias signal, a low impedance circuit electrically coupled with the output amplifier stage, the low impedance circuit configured to reduce an impedance of the output amplifier stage, and a current source electrically coupled with the low impedance circuit, the current source configured to drive the low impedance circuit to reduce loading of the output amplifier stage by the low impedance circuit.
    Type: Application
    Filed: December 12, 2008
    Publication date: June 17, 2010
    Inventor: Ananthasayanam Chellappa
  • Publication number: 20090108917
    Abstract: Methods and apparatus to produce fully isolated NPN-based bandgap references are disclosed. A disclosed method to form a bandgap reference comprises generating a first current that is proportional-to-temperature, generating a second current that is complementary-to-temperature, and adding the currents to form a third current that is constant over a change in temperature.
    Type: Application
    Filed: October 31, 2007
    Publication date: April 30, 2009
    Inventor: Ananthasayanam Chellappa
  • Publication number: 20090108918
    Abstract: Methods and apparatus for a PTAT reference in a fully isolated NPN-based bandgap references are disclosed. A disclosed method to form a bandgap reference comprises generating a first current that is constant over a change in temperature, generating a second current that is complementary-to-temperature, and generating a current that is proportional-to-temperature.
    Type: Application
    Filed: October 31, 2007
    Publication date: April 30, 2009
    Inventor: Ananthasayanam Chellappa
  • Publication number: 20090110027
    Abstract: Methods and apparatus for a fully isolated NPN-based temperature detector are disclosed. A disclosed method to determine the temperature of a circuit comprises generating a first current that increases as temperature increases, generating a second current that decreases as temperature increases, and detecting the temperature by receiving a first and second signal based on the first and second currents to determine whether the temperature exceeds at least one temperature threshold.
    Type: Application
    Filed: October 31, 2007
    Publication date: April 30, 2009
    Inventor: Ananthasayanam Chellappa