Patents by Inventor Anasuya Vishwas KULKARNI

Anasuya Vishwas KULKARNI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11875728
    Abstract: A method for mitigating interference across analog signal lines includes receiving a digital data stream including a plurality of discrete signal patterns configured to drive a plurality of different analog signal lines. An edge buffer for each analog signal line is populated with edge data representing pulse edges of upcoming signal patterns set to drive the analog signal line. A target buffer for a target signal line is populated with target data representing a target signal pattern. Based at least in part on determining that edge buffers corresponding to one or more potentially interfering analog signal lines include edge data corresponding to post-target pulse edges, one or more potentially interfering signal patterns are identified. A selected set of the potentially interfering signal patterns are used to modify the target signal pattern to perform preemptive interference mitigation.
    Type: Grant
    Filed: December 30, 2021
    Date of Patent: January 16, 2024
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Christopher Michael Babecki, Ryan Scott Haraden, Jingyang Xue, Anasuya Vishwas Kulkarni
  • Patent number: 11742867
    Abstract: A method for mitigating interference across analog signal lines includes receiving a digital data stream including a plurality of discrete signal patterns configured to drive a plurality of different analog signal lines. An edge buffer for each analog signal line is populated with edge data representing pulse edges of upcoming signal patterns set to drive the analog signal line. A target buffer for a target signal line is populated with target data representing a target signal pattern. Edge buffers corresponding to potentially interfering analog signal lines are searched to identify potentially interfering pulse edges. A set of potentially interfering pulse edges are selected for interference mitigation, and the target signal pattern is modified to perform preemptive interference mitigation based at least in part on the selected pulse edges.
    Type: Grant
    Filed: December 30, 2021
    Date of Patent: August 29, 2023
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Christopher Michael Babecki, Ryan Scott Haraden, Jingyang Xue, Anasuya Vishwas Kulkarni
  • Publication number: 20230215334
    Abstract: A method for mitigating interference across analog signal lines includes receiving a digital data stream including a plurality of discrete signal patterns configured to drive a plurality of different analog signal lines. An edge buffer for each analog signal line is populated with edge data representing pulse edges of upcoming signal patterns set to drive the analog signal line. A target buffer for a target signal line is populated with target data representing a target signal pattern. Based at least in part on determining that edge buffers corresponding to one or more potentially interfering analog signal lines include edge data corresponding to post-target pulse edges, one or more potentially interfering signal patterns are identified. A selected set of the potentially interfering signal patterns are used to modify the target signal pattern to perform preemptive interference mitigation.
    Type: Application
    Filed: December 30, 2021
    Publication date: July 6, 2023
    Applicant: Microsoft Technology Licensing, LLC
    Inventors: Christopher Michael BABECKI, Ryan Scott HARADEN, Jingyang XUE, Anasuya Vishwas KULKARNI
  • Publication number: 20230216514
    Abstract: A method for mitigating interference across analog signal lines includes receiving a digital data stream including a plurality of discrete signal patterns configured to drive a plurality of different analog signal lines. An edge buffer for each analog signal line is populated with edge data representing pulse edges of upcoming signal patterns set to drive the analog signal line. A target buffer for a target signal line is populated with target data representing a target signal pattern. Edge buffers corresponding to potentially interfering analog signal lines are searched to identify potentially interfering pulse edges. A set of potentially interfering pulse edges are selected for interference mitigation, and the target signal pattern is modified to perform preemptive interference mitigation based at least in part on the selected pulse edges.
    Type: Application
    Filed: December 30, 2021
    Publication date: July 6, 2023
    Applicant: Microsoft Technology Licensing, LLC
    Inventors: Christopher Michael Babecki, Ryan Scott Haraden, Jingyang Xue, Anasuya Vishwas Kulkarni