Abstract: A display may be formed by an array of light-emitting diodes mounted to the surface of a display substrate. The light-emitting diodes may be inorganic light-emitting diodes formed from separate crystalline semiconductor structures. An array of pixel control circuits may be used to control light emission from the light-emitting diodes. Each pixel control circuit may be configured to control one or more respective passive matrices. To control partial pixel cells in the display, a donor pixel control circuit in a partial pixel cell may control the pixels in a receptor partial pixel cell without a pixel control circuit. To mitigate the size of an inactive area of the display, fanout signal lines for the display may be formed in the light-emitting active area of the display. The fanout signal lines may be formed between a row of pixel control circuits and a bottom edge of the light-emitting active area.

Abstract: A display may be formed by an array of light-emitting diodes mounted to the surface of a display substrate. The light-emitting diodes may be inorganic light-emitting diodes formed from separate crystalline semiconductor structures. An array of pixel control circuits may be used to control light emission from the light-emitting diodes. Each pixel control circuit may be configured to control one or more respective passive matrices. To control partial pixel cells in the display, a donor pixel control circuit in a partial pixel cell may control the pixels in a receptor partial pixel cell without a pixel control circuit. To mitigate the size of an inactive area of the display, fanout signal lines for the display may be formed in the light-emitting active area of the display. The fanout signal lines may be formed between a row of pixel control circuits and a bottom edge of the light-emitting active area.

Abstract: A display may be formed by an array of light-emitting diodes mounted to the surface of a display substrate. The light-emitting diodes may be inorganic light-emitting diodes formed from separate crystalline semiconductor structures. An array of pixel control circuits may be used to control light emission from the light-emitting diodes. Each pixel control circuit may be conred to control one or more respective passive matrices. To control partial pixel cells in the display, a donor pixel control circuit in a partial pixel cell may control the pixels in a receptor partial pixel cell without a pixel control circuit. To mitigate the size of an inactive area of the display, fanout signal lines for the display may be formed in the light-emitting active area of the display. The fanout signal lines may be formed between a row of pixel control circuits and a bottom edge of the light-emitting active area.

Abstract: A MEMS device having a channel configured to avoid particle contamination is disclosed. The MEMS device includes a MEMS substrate and a base substrate. The MEMS substrate includes a MEMS device area, a seal ring and a channel. The seal ring provides for dividing the MEMS device area into a plurality of cavities, wherein at least one of the plurality of cavities includes one or more vent holes. The channel is configured between the one or more vent holes and the MEMS device area. Preferably, the channel is configured to minimize particles entering the MEMS device area directly. The base substrate is coupled to the MEMS device substrate.