Abstract: A gate driver integrated circuit drives an output signal onto its output terminal and onto the gate of a power transistor. In a turn-on episode, a digital input signal transitions to a digital logic high level. In response, the gate driver integrated circuit couples the output terminal to a positive supply voltage terminal, thereby driving a positive voltage onto the gate of the power transistor. In response to a high-to-low transition of the digital input signal, the driver drives a negative voltage onto the output terminal and power transistor gate for a short self-timed period of time, and then couples the output terminal to a ground terminal, thereby driving the output terminal and power transistor gate up to ground potential. The output terminal and power transistor gate are then held at ground potential in anticipation of the next turn-on episode of the power transistor.

Abstract: A sense resistor is placed in series with an output capacitor of a buck converter. The buck converter operates in a discontinuous mode such that there is a dead time in each switching cycle. A control circuit senses a voltage across the sense resistor and thereby generates a first signal ICS. The control circuit detects an offset voltage in ICS, where the offset voltage is the voltage of ICS during the dead time in a first switching cycle. The control circuit level shifts the entire ICS by the offset voltage, thereby generating a second signal ICLS. ICLS has the same waveform as the waveform of the inductor current. In a second cycle, ICLS is used to determine when to turn off the main switch and when the start of the dead time occurs. ICLS and the offset voltage are used together to determine when to turn the main switch on.

Abstract: In a switching converter having an inductive load, a current may flow through the body diode of a transistor even though the gate of the transistor is being controlled to keep the transistor off. Then when the other transistor of the switch leg is turned on, a reverse recovery current flows in the reverse direction through the body diode. To reduce switching losses associated with such current flows, a gate driver integrated circuit detects when current flow through the body diode rises above a threshold current. The gate driver integrated circuit then controls the transistor to turn on. Then when the other transistor of the switch leg is made to turn on, the gate driver first turns the transistor off. When the gate-to-source voltage of the turning off transistor drops below a threshold voltage, then the gate driver integrated circuit allows and controls the other transistor to turn on.

Abstract: In a switching converter having an inductive load, a current may flow through the body diode of a transistor even though the gate of the transistor is being controlled to keep the transistor off. Then when the other transistor of the switch leg is turned on, a reverse recovery current flows in the reverse direction through the body diode. To reduce switching losses associated with such current flows, a gate driver integrated circuit detects when current flow through the body diode rises above a threshold current. The gate driver integrated circuit then controls the transistor to turn on. Then when the other transistor of the switch leg is made to turn on, the gate driver first turns the transistor off. When the gate-to-source voltage of the turning off transistor drops below a threshold voltage, then the gate driver integrated circuit allows and controls the other transistor to turn on.

Abstract: A sense resistor is placed in series with an output capacitor of a buck converter. The buck converter operates in a discontinuous mode such that there is a dead time in each switching cycle. A control circuit senses a voltage across the sense resistor and thereby generates a first signal ICS. The control circuit detects an offset voltage in ICS, where the offset voltage is the voltage of ICS during the dead time in a first switching cycle. The control circuit level shifts the entire ICS by the offset voltage, thereby generating a second signal ICLS. ICLS has the same waveform as the waveform of the inductor current. In a second cycle, ICLS is used to determine when to turn off the main switch and when the start of the dead time occurs. ICLS and the offset voltage are used together to determine when to turn the main switch on.

Abstract: A gate driver integrated circuit drives an output signal onto its output terminal and onto the gate of a power transistor. In a turn-on episode, a digital input signal transitions to a digital logic high level. In response, the gate driver integrated circuit couples the output terminal to a positive supply voltage terminal, thereby driving a positive voltage onto the gate of the power transistor. In response to a high-to-low transition of the digital input signal, the driver drives a negative voltage onto the output terminal and power transistor gate for a short self-timed period of time, and then couples the output terminal to a ground terminal, thereby driving the output terminal and power transistor gate up to ground potential. The output terminal and power transistor gate are then held at ground potential in anticipation of the next turn-on episode of the power transistor.

Abstract: In a switching converter having an inductive load, a current may flow through the body diode of a transistor even though the gate of the transistor is being controlled to keep the transistor off. Then when the other transistor of the switch leg is turned on, a reverse recovery current flows in the reverse direction through the body diode. To reduce switching losses associated with such current flows, a gate driver integrated circuit detects when current flow through the body diode rises above a threshold current. The gate driver integrated circuit then controls the transistor to turn on. Then when the other transistor of the switch leg is made to turn on, the gate driver first turns the transistor off. When the gate-to-source voltage of the turning off transistor drops below a threshold voltage, then the gate driver integrated circuit allows and controls the other transistor to turn on.

Abstract: A gate driver integrated circuit drives an output signal onto its output terminal and onto the gate of a power transistor. In a turn-on episode, a digital input signal transitions to a digital logic high level. In response, the gate driver integrated circuit couples the output terminal to a positive supply voltage terminal, thereby driving a positive voltage onto the gate of the power transistor. In response to a high-to-low transition of the digital input signal, the driver drives a negative voltage onto the output terminal and power transistor gate for a short self-timed period of time, and then couples the output terminal to a ground terminal, thereby driving the output terminal and power transistor gate up to ground potential. The output terminal and power transistor gate are then held at ground potential in anticipation of the next turn-on episode of the power transistor.

Abstract: A sense resistor is placed in series with an output capacitor of a buck converter. The buck converter operates in a discontinuous mode such that there is a dead time in each switching cycle. A control circuit senses a voltage across the sense resistor and thereby generates a first signal ICS. The control circuit detects an offset voltage in ICS, where the offset voltage is the voltage of ICS during the dead time in a first switching cycle. The control circuit level shifts the entire ICS by the offset voltage, thereby generating a second signal ICLS. ICLS has the same waveform as the waveform of the inductor current. In a second cycle, ICLS is used to determine when to turn off the main switch and when the start of the dead time occurs. ICLS and the offset voltage are used together to determine when to turn the main switch on.

Abstract: A gate driver integrated circuit drives an output signal onto its output terminal and onto the gate of a power transistor. In a turn-on episode, a digital input signal transitions to a digital logic high level. In response, the gate driver integrated circuit couples the output terminal to a positive supply voltage terminal, thereby driving a positive voltage onto the gate of the power transistor. In response to a high-to-low transition of the digital input signal, the driver drives a negative voltage onto the output terminal and power transistor gate for a short self-timed period of time, and then couples the output terminal to a ground terminal, thereby driving the output terminal and power transistor gate up to ground potential. The output terminal and power transistor gate are then held at ground potential in anticipation of the next turn-on episode of the power transistor.

Abstract: A sense resistor is placed in series with an output capacitor of a buck converter. The buck converter operates in a discontinuous mode such that there is a dead time in each switching cycle. A control circuit senses a voltage across the sense resistor and thereby generates a first signal ICS. The control circuit detects an offset voltage in ICS, where the offset voltage is the voltage of ICS during the dead time in a first switching cycle. The control circuit level shifts the entire ICS by the offset voltage, thereby generating a second signal ICLS. ICLS has the same waveform as the waveform of the inductor current. In a second cycle, ICLS is used to determine when to turn off the main switch and when the start of the dead time occurs. ICLS and the offset voltage are used together to determine when to turn the main switch on.

Abstract: A sense resistor is placed in series with an output capacitor of a buck converter. The buck converter operates in a discontinuous mode such that there is a dead time in each switching cycle. A control circuit senses a voltage across the sense resistor and thereby generates a first signal ICS. The control circuit detects an offset voltage in ICS, where the offset voltage is the voltage of ICS during the dead time in a first switching cycle. The control circuit level shifts the entire ICS by the offset voltage, thereby generating a second signal ICLS. ICLS has the same waveform as the waveform of the inductor current. In a second cycle, ICLS is used to determine when to turn off the main switch and when the start of the dead time occurs. ICLS and the offset voltage are used together to determine when to turn the main switch on.

Abstract: A rectifier includes a larger Field Effect Transistor (FET1) and a smaller FET (FET2). A sense resistor is in series with FET2's body diode between a cathode terminal and an anode terminal. If the cathode terminal voltage is greater than the voltage on the anode terminal, then body diodes of FETs are reverse biased, the FETs are controlled to be off, and there is no current flow through the rectifier. If, however, the voltage on the anode terminal becomes positive with respect to the cathode terminal, then the body diode of FET2 starts to conduct and there is a voltage drop across the sense resistor. A comparator detects this condition and turns both FETs on. The rectifier is then conductive, so current can flow from the anode terminal, through the larger FET1, and to the cathode terminal, with a small forward voltage drop and without passing across the sense resistor.

Abstract: A rectifier includes a larger Field Effect Transistor (FET1) and a smaller FET (FET2). A sense resistor is in series with FET2's body diode between a cathode terminal and an anode terminal. If the cathode terminal voltage is greater than the voltage on the anode terminal, then body diodes of FETs are reverse biased, the FETs are controlled to be off, and there is no current flow through the rectifier. If, however, the voltage on the anode terminal becomes positive with respect to the cathode terminal, then the body diode of FET2 starts to conduct and there is a voltage drop across the sense resistor. A comparator detects this condition and turns both FETs on. The rectifier is then conductive, so current can flow from the anode terminal, through the larger FET1, and to the cathode terminal, with a small forward voltage drop and without passing across the sense resistor.

Abstract: An AC-to-DC converter involves a rectifier, an inductor, a storage capacitor, a switch, and a microcontroller. In a capacitor pre-charge operation, the periodicity and voltage amplitude of an AC supply voltage are determined. Based on this, the microcontroller identifies one of a plurality of stored sequences. Each sequence is a list of values. The microcontroller turns off the switch on AC supply voltage zero crossings and turns on the switch in accordance with the values. As a result, a sequence of identical pulses of charging current flows into the storage capacitor. Each pulse passes in a current path from the rectifier, through the inductor, through the capacitor, through the switch, and back to the rectifier. During the pre-charge operation, the microcontroller does not measure the capacitor voltage and use that to calculate when to the turn the switch on next, but rather the sequence of precalculated stored values is used.

Abstract: A sense resistor is placed in series with an output capacitor of a buck converter. The buck converter operates in a discontinuous mode such that there is a dead time in each switching cycle. A control circuit senses a voltage across the sense resistor and thereby generates a first signal ICS. The control circuit detects an offset voltage in ICS, where the offset voltage is the voltage of ICS during the dead time in a first switching cycle. The control circuit level shifts the entire ICS by the offset voltage, thereby generating a second signal ICLS. ICLS has the same waveform as the waveform of the inductor current. In a second cycle, ICLS is used to determine when to turn off the main switch and when the start of the dead time occurs. ICLS and the offset voltage are used together to determine when to turn the main switch on.

Abstract: The present disclosure describes a technique for reducing east-west geometry mismatch between the top and bottom of a raster display. This is accomplished by generating a horizontal correction signal that does not have any discontinuities. Since there are no discontinuities in the horizontal correction signal, the horizontal deflection current signal will not be distorted. As a result, there will be no east-west geometry mismatch between the top and bottom of the raster display.

Abstract: A microcontroller has an integrating analog-to-digital converter (IADC) with an in-situ autocalibrating functionality. On-chip autocalibrating circuitry supplies a first predetermined analog input voltage to the IADC and obtains a first data value from the IADC. The autocalibrating circuitry supplies a second predetermined analog input voltage to the IADC and obtains a second data value. The first and second data values are used to calibrate the IADC such that if the first input voltage is later supplied to the IADC, then the IADC will output a first predetermined desired digital output value and such that if the second input voltage is later supplied to the IADC, then the IADC will output a second predetermined desired digital output value. The first and second analog input voltages are generated on-chip so the calibration is performed automatically without having to supply external calibrating signals to the microcontroller. Other related methods and circuitry is disclosed.

Abstract: An accelerometer-based mouse is one example of a device that determines the distance an object moves. The mouse disables a cursor from moving across a computer screen during movements of the mouse that occur while the mouse is lifted from a working surface. A mouse control unit generates a cursor movement disable signal that stops the cursor from moving from the time the mouse is lifted until the mouse is set down. The mouse control unit generates the disable signal by determining the derivative of an acceleration signal for the vertical (z) dimension relative to the working surface. The mouse includes a microcontroller programmed to disengage cursor movement when the cursor movement disable signal is asserted. The mouse does not include a ball and rollers whose performance can degrade as they become dirty. The mouse can detect movement even when the mouse slides over a surface that has no pattern.

Abstract: An integrated circuit includes an analog-to-digital (ADC) portion and a processor portion. The processor portion generates high frequency noise. The ADC portion includes chopper switches, an ADC, a first low-pass filter (LPF), an inverter, and a second LPF. An analog sensor signal is chopped by the chopper switches at a chopping frequency below the processor noise frequency. The ADC performs conversions a rate higher than the chopper frequency such that multiple first conversions are performed when the chopper switches are in a first configuration and multiple second conversions are performed when the chopper switches are in a second configuration. The first LPF attenuates the high frequency noise, converts the first conversions into first information, and converts the second conversions into second information. The inverter inverts the second information. The second LPF attenuates transposed 1/F noise and converts the first information and the inverted second information into ADC output values.