Patents by Inventor Andre Arens

Andre Arens has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20150342055
    Abstract: A semiconductor module includes a printed circuit board, and first and second embedded semiconductor chips. The first and second semiconductor chips each have a first load connection and a second load connection. The printed circuit board further includes a structured first metalization layer, which has a first section and a second section, and a structured second metalization layer, which has a first section, a second section and a third section. The first section of the second metalization layer and the second section of the first metalization layer have comb shaped structures having first and second protrusions. These first and second sections are electrically conductively connected to one another by a number of first plated-through holes each of which is permanently electrically conductively connected both at first protrusions to the first section of the second metalization layer and at second protrusions to the second section of the first metalization layer.
    Type: Application
    Filed: May 12, 2015
    Publication date: November 26, 2015
    Inventor: Andre Arens
  • Publication number: 20150092376
    Abstract: A printed circuit board (PCB) has a first, structured metalization arranged on its top side and at least one second metalization arranged below the first metalization in a vertical direction, parallel to the first metalization and insulated therefrom. Also on the PCB top side is a bare semiconductor chip having contact electrodes connected by bonding wires to corresponding contact pads of the first metalization on the PCB top side. A first portion of the contact electrodes and corresponding contact pads carry high voltage during operation. All high-voltage-carrying contact pads are conductively connected to the second metalization via plated-through holes. An insulation layer completely covers the chip and a delimited region of the PCB around the chip, and all high-voltage-carrying contact pads and the plated-through holes are completely covered by the insulation layer. A second portion of the contact electrodes and corresponding contact pads are under low voltages during operation.
    Type: Application
    Filed: September 29, 2014
    Publication date: April 2, 2015
    Inventors: Andre Arens, Juergen Hoegerl, Magdalena Hoier
  • Patent number: 8994413
    Abstract: A method for driving a controllable power semiconductor switch, having a first input terminal and first and second output terminals coupled to a voltage supply and a load, the first and second output terminals providing an output of the power semiconductor switch, includes adjusting a gradient of switch-off edges of an output current and an output voltage of the power semiconductor switch by a voltage source arrangement coupled to the input terminal. A gradient of switch-on edges of an output current and an output voltage is adjusted by a controllable current source arrangement that is coupled to the input terminal and generates a gate drive current. The profile of the gate drive current from one switching operation to a subsequent switching operation, beginning at a rise in the output current and ending at a decrease in the output voltage, is varied at most within a predefined tolerance band.
    Type: Grant
    Filed: April 26, 2013
    Date of Patent: March 31, 2015
    Assignee: Infineon Technologies AG
    Inventors: Peter Kanschat, Andre Arens, Hartmut Jasberg, Ulrich Schwarzer
  • Publication number: 20130285712
    Abstract: A method for driving a controllable power semiconductor switch, having a first input terminal and first and second output terminals coupled to a voltage supply and a load, the first and second output terminals providing an output of the power semiconductor switch, includes adjusting a gradient of switch-off edges of an output current and an output voltage of the power semiconductor switch by a voltage source arrangement coupled to the input terminal. A gradient of switch-on edges of an output current and an output voltage is adjusted by a controllable current source arrangement that is coupled to the input terminal and generates a gate drive current. The profile of the gate drive current from one switching operation to a subsequent switching operation, beginning at a rise in the output current and ending at a decrease in the output voltage, is varied at most within a predefined tolerance band.
    Type: Application
    Filed: April 26, 2013
    Publication date: October 31, 2013
    Inventors: Peter Kanschat, Andre Arens, Hartmut Jasberg, Ulrich Michael Georg Schwarzer