Abstract: Disclosed is a method of switching modes in a serial data communication network comprising a plurality of interconnected nodes, each of said nodes comprising a plurality of mode-dependent configurations, the method including, during a first mode, issuing an instruction to said nodes, said instruction identifying a next mode of the data communication network; terminating said first mode; and following said termination, reconfiguring each of said nodes in accordance with the configuration corresponding to said next mode identified by said instruction. A serial data communication network implementing such a method is also disclosed.

Abstract: A circuit is operable in a normal operating mode and a test mode. The circuit contains a privileged information supply circuit (12) coupled to the testable circuit (10). A test access circuit (19) provides access to the testable circuit (10). A test control circuit (18) controls switching of the test access circuit (19) to the test mode. A multiplex circuit (16) couples the privileged information supply circuit (12) to the testable circuit (10) for access to privileged information in the normal mode. In the test mode the shadow information supply circuit (14) is coupled to the testable circuit (10) instead.

Abstract: Various exemplary embodiments relate to a verification system and method for verifying whether a vehicle is equipped with a functional on-board unit (OBU). The system may include a license plate recognition system configured to obtain a license plate number of the vehicle at a first location; a database of license plate numbers and OBU information; a wireless communication system configured to send a trigger message to the OBU using the OBU information, and configured to receive a response from the OBU indicating a location of the OBU; and a verification module configured to determine whether the vehicle is equipped with the OBU. The database may include a correspondence of license plate numbers and OBU information. The verification module may determine that the vehicle is equipped with the OBU if the location reported by the OBU is within a specified distance of the first location.

Abstract: The subject matter hereof relates to error detection. Various example embodiments for error defection are disclosed. In an example method of error detection in a Module UnderTest (MUT), a parity signal representing the parity of an MUT output is compared to a parity signal representing the parity of an errorless MUT output. In an example system, an Actual Parity Generator provides a parity signal representing the parity of on MUT output, a State Parity Generator provides a parity signal representing the parity of an errorless MUT output, and a comparator compares these two parity signals.

Abstract: A data processing system 100 comprising a monitor 120 is provided and corresponding system-on-chip, method for monitoring and computer program product. The data processing system comprises multiple processing devices 104, 106, 116, 116 and a monitor 120. The monitor is configured to monitor characteristics of the data streams 102, 112, occurring among the plurality of data processing devices. The monitor comprises a means to determine whether a system characteristic substantially deviates from an expected system characteristic and to raise an anomaly signal if so. The system characteristic depends on the first characteristic and the second characteristic. In this way the monitor increases robustness by monitoring for problems related to deviations in the relation between multiple data streams.

Abstract: Various exemplary embodiments relate to a verification system and method for verifying whether a vehicle is equipped with a functional on-board unit (OBU). The system may include a license plate recognition system configured to obtain a license plate number of the vehicle at a first location; a database of license plate numbers and OBU information; a wireless communication system configured to send a trigger message to the OBU using the OBU information, and configured to receive a response from the OBU indicating a location of the OBU; and a verification module configured to determine whether the vehicle is equipped with the OBU. The database may include a correspondence of license plate numbers and OBU information. The verification module may determine that the vehicle is equipped with the OBU if the location reported by the OBU is within a specified distance of the first location.

Abstract: The present invention relates to a circuit for sorting a set of data values, the circuit comprising a first set of p+q registers for storing the p+q largest data values of the set of data values including p statistical outliers; a second set of p+q registers for storing the p+q smallest data values of the set of data values including p statistical outliers, wherein p is a non-negative integer and q is a positive integer; a controller coupled to each register in said first and second sets, said controller being arranged to: receive the set of data values and for each data value obtain a comparison result of the data value with the respective data values in each of said registers; and update said registers as a function of said comparison results; the circuit further comprising a data processing circuit coupled to at least the q registers in said first and second sets, which for instance may be used to produce an average value of the data values stored in said q registers in response to the controller.

Abstract: Disclosed is a method of switching modes in a serial data communication network comprising a plurality of interconnected nodes, each of said nodes comprising a plurality of mode-dependent configurations, the method including, during a first mode, issuing an instruction to said nodes, said instruction identifying a next mode of the data communication network; terminating said first mode; and following said termination, reconfiguring each of said nodes in accordance with the configuration corresponding to said next mode identified by said instruction. A serial data communication network implementing such a method is also disclosed.

Abstract: A data processing system 100 comprising a monitor 120 is provided and corresponding system-on-chip, method for monitoring and computer program product. The data processing system comprises multiple processing devices 104, 106, 116, 116 and a monitor 120. The monitor is configured to monitor characteristics of the data streams 102, 112, occurring among the plurality of data processing devices. The monitor comprises a means to determine whether a system characteristic substantially deviates from an expected system characteristic and to raise an anomaly signal if so. The system characteristic depends on the first characteristic and the second characteristic. In this way the monitor increases robustness by monitoring for problems related to deviations in the relation between multiple data streams.

Abstract: A circuit is operable in a normal operating mode and a test mode. The circuit contains a privileged information supply circuit (12) coupled to the testable circuit (10). A test access circuit (19) provides access to the testable circuit (10). A test control circuit (18) controls switching of the test access circuit (19) to the test mode. A multiplex circuit (16) couples the privileged information supply circuit (12) to the testable circuit (10) for access to privileged information in the normal mode. In the test mode the shadow information supply circuit (14) is coupled to the testable circuit (10) instead.

Abstract: A system is described for personalization of vehicle operations. The system includes a smart card reader and a vehicle computer system. The smart card reader reads user-specific personalization information from a smart card corresponding to a user of the smart card within the vehicle. The vehicle computer system receives the user-specific personalization information from the smart card reader and implements user-specific functionality within the vehicle based on the user-specific personalization information.

Abstract: A module for transmitting sets of data bits to another module via a communication bus using dual-rail encoding is provided that has a reduced switching activity. The module comprises bus invert coding means adapted to compare a set of data bits with a preceding set of data bits to determine an indication of the number of transitions required to transmit the set of data bits; invert the set of data bits prior to transmission if it is determined that the number of transitions required to transmit the set of data bits is greater than half the total number of bits in the set of data bits; and provide an indication of whether the set of data bits has been inverted; the module also comprising means adapted to generate respective copies of the data bits in the set of data bits; and means adapted to transmit to the other module, via the communication bus, the set of data bits, their respective copies and the indication of whether the set of data bits has been inverted.

Abstract: An integrated circuit (10) comprises a functional circuit (12a-c) that contain information that must be secured against unauthorized access. The integrated circuit comprises a test access circuit (14, 16) coupled to the functional circuit (12a-c), and a plurality of fuse elements (18) coupled to the test access circuit (14, 16). The fuse elements (18) are connected in a circuit configuration that makes the functional circuit (12a-c) consistently accessible via the test access circuit (14, 16) only when first fuse elements (18) of the plurality are in a blown state and second fuse elements (18) of the plurality are in a not-blown state. As a result the integrated circuit can be tested after selectively blowing all of the first fuse elements (18). After testing at least part of the second fuse elements (18) is blown.

Abstract: An integrated circuit (10) comprises a scan chain (14) with parallel inputs and outputs coupled to a functional circuit (12a-c). A scan chain modifying circuit (43, 47, 70a-c) is provided coupled to the scan chain (14). When testing is authorized the scan chain modifying circuit operates in a mode wherein a normal shift path is provided through the scan chain. When testing is not authorized the scan chain modifying circuit (43, 47, 70a-c) operates to effect spontaneous dynamic changes in the shift path, which dynamically vary the length of the shift path between external terminals of the integrated circuit while shifting takes place. In an embodiment the dynamical variations are controlled by a running key comparison. In other embodiments running key comparison is used to disable transfer through the scan chain and/or operation of functional circuits.

Abstract: An electronic device with logic circuitry (LC) is provided. The logic circuitry (LC) comprises at least one electronic unit (EU), in particular one logic gate with a first electronic component (EC1) for performing logic operations; and at least one second electronic component (EC2) for improving the soft-error sensitivity of the logic circuitry (LC). The first and the second electronic component (EC1, EC2) are implemented with substantially the same logical function. The second electronic component (EC2) is redundant. In addition, the inputs of the first and the second electronic component (EC1, E2) are coupled and the outputs of the first and the second electronic component (EC1, E2) are coupled, respectively.

Abstract: A module for transmitting sets of data bits to another module via a communication bus using dual-rail encoding is provided that has a reduced switching activity. The module comprises bus invert coding means adapted to compare a set of data bits with a preceding set of data bits to determine an indication of the number of transitions required to transmit the set of data bits; invert the set of data bits prior to transmission if it is determined that the number of transitions required to transmit the set of data bits is greater than half the total number of bits in the set of data bits; and provide an indication of whether the set of data bits has been inverted; the module also comprising means adapted to generate respective copies of the data bits in the set of data bits; and means adapted to transmit to the other module, via the communication bus, the set of data bits, their respective copies and the indication of whether the set of data bits has been inverted.

Abstract: The invention relates to a device for parallel data processing, a DSP. The device according to the invention comprises a processor matrix (100) in which processors (103) are arranged in rows (101) and columns (102). Furthermore, the device (100) comprises first and second external data ports (107, 108). The rows (101) arranged in a stepwise manner and the columns are arranged in a stepwise manner. The processors (103) have a first processor data port (104), which is connected with one of the first external data ports (107) by means of first essentially straight connection. The processors (103) further comprise a second processor data port (105), which is connected with one of the second external data ports (108) by means of an essentially straight second connection (110). The first connection (107) and the second connection (108) are oriented substantially orthogonal to each other.

Abstract: A data processing apparatus according to the invention comprises at least a first (1.2) and a second processor (1.3), which processors are capable of communicating data to each other by exchanging tokens via a buffer according to a synchronization protocol. The protocol maintains synchronization information comprising at least a first and a second synchronization counter (writec, readc), which are readable by both processors. At least the first processor (1.2) is capable of modifying the first counter (writec), and at least the second processor (1.3) is capable of modifying the second counter (readc). The protocol comprises at least a first command (claim) which when issued by a processor results in a verification whether a requested number of tokens is available to said processor, and a second command (release) which results in updating one of the synchronization counters to indicate that tokens are released for use by the other processor. At least one of the processors (1.

Abstract: The invention relates to a digital system (1) and the method for error detection thereof. The digital system (1) comprises, as it's main core, a Module under Test (110) included in a Digital Processing Unit (100) and a State Parity Generator (SPG) (300). The SPG (300) is an equivalent with respect to parity of the Module under Test (300). An equivalent with respect to parity is a combinatorial circuit that, when an imput vector is applied at the imput of both Module under Test (110) and SPG (300), the output of the SPG (300) generates at it's output the parity of the transfer function of the Module under Test (110).

Abstract: Various exemplary embodiments relate to a verification system and method for verifying whether a vehicle is equipped with a functional on-board unit (OBU). The system may include a license plate recognition system configured to obtain a license plate number of the vehicle at a first location; a database of license plate numbers and OBU information; a wireless communication system configured to send a trigger message to the OBU using the OBU information, and configured to receive a response from the OBU indicating a location of the OBU; and a verification module configured to determine whether the vehicle is equipped with the OBU. The database may include a correspondence of license plate numbers and OBU information. The verification module may determine that the vehicle is equipped with the OBU if the location reported by the OBU is within a specified distance of the first location.