Patents by Inventor Andre Uhlemann

Andre Uhlemann has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11810889
    Abstract: An external contact element for a power semiconductor module includes a bonded blank strip, the bonded blank strip being formed such that the external contact element includes: a first contact portion configured to be coupled to the power semiconductor module by a first solder joint, a second contact portion spaced from the first contact portion in a thickness direction out of the plane of the first contact portion, the second contact portion being configured to be coupled to an external appliance, and a spring portion connecting the first and second contact portions to each other and configured to compensate a movement along the thickness direction. The bonded blank strip includes a first sheet of a first metal or first metal alloy and a second sheet of a different second metal or second metal alloy. The second sheet is omitted from at least a substantial part of the first contact portion.
    Type: Grant
    Filed: February 21, 2022
    Date of Patent: November 7, 2023
    Assignee: Infineon Technologies AG
    Inventors: Andre Uhlemann, Christoph Koch
  • Publication number: 20230317560
    Abstract: A power semiconductor module includes a carrier comprising a first side and an opposite second side, a power semiconductor die arranged at the first side of the carrier, and a housing arranged at least partially on the second side of the carrier and forming a joining site for a cooler on the second side. The joining site completely surrounds an inner portion of the second side of the carrier. The inner portion is configured to be in direct contact with a cooling fluid within the cooler.
    Type: Application
    Filed: March 17, 2023
    Publication date: October 5, 2023
    Inventor: Andre Uhlemann
  • Patent number: 11778735
    Abstract: A circuit board includes: an electrically insulating part and an electrically conductive part; at least one semiconductor chip embedded into the electrically insulating part in a part of the circuit board; and a cooling area above and below the at least one semiconductor chip. The electrically conductive part includes a first outer conductive layer on the first surface, a second outer conductive layer on the second surface, and a first inner conductive layer which is electrically connected to the semiconductor chip. The first inner conductive layer is electrically insulated from the first outer conductive layer and from the second outer conductive layer by the electrically insulating part in the cooling area, or is electrically connected to the first outer conductive layer outside the cooling area.
    Type: Grant
    Filed: March 1, 2022
    Date of Patent: October 3, 2023
    Assignee: Infineon Technologies AG
    Inventors: Tomas Manuel Reiter, Mark Nils Muenzer, Andre Uhlemann
  • Patent number: 11631974
    Abstract: A snubber circuit includes a snubber substrate including an electrically insulating carrier and an electrically conducting structured layer applied thereon, the electrically conducting structured layer including two segments. The snubber circuit further includes two electrically resistive layers, each resistive layer being applied onto the two segments of the electrically conducting structured layer of the snubber substrate, and a capacitor disposed on the electrically resistive layers and having two terminals, each terminal being electrically connected to one of the electrically resistive layers. Further, a power semiconductor module having such a snubber circuit is disclosed.
    Type: Grant
    Filed: July 2, 2020
    Date of Patent: April 18, 2023
    Assignee: Infineon Technologies AG
    Inventors: Michael Schlueter, Andre Uhlemann
  • Patent number: 11598904
    Abstract: A power semiconductor module includes a first substrate, wherein the first substrate includes aluminum, a first aluminum oxide layer arranged on the first substrate, a conductive layer arranged on the first aluminum oxide layer, a first semiconductor chip, wherein the first semiconductor chip is arranged on the conductive layer and is electrically connected thereto, and an electrical insulation material enclosing the first semiconductor chip, wherein the first aluminum oxide layer is configured to electrically insulate the first semiconductor chip from the first substrate.
    Type: Grant
    Filed: December 5, 2019
    Date of Patent: March 7, 2023
    Assignee: Infineon Technologies AG
    Inventors: Ivan Nikitin, Dirk Ahlers, Andreas Grassmann, Andre Uhlemann
  • Publication number: 20220278070
    Abstract: An external contact element for a power semiconductor module includes a bonded blank strip, the bonded blank strip being formed such that the external contact element includes: a first contact portion configured to be coupled to the power semiconductor module by a first solder joint, a second contact portion spaced from the first contact portion in a thickness direction out of the plane of the first contact portion, the second contact portion being configured to be coupled to an external appliance, and a spring portion connecting the first and second contact portions to each other and configured to compensate a movement along the thickness direction. The bonded blank strip includes a first sheet of a first metal or first metal alloy and a second sheet of a different second metal or second metal alloy. The second sheet is omitted from at least a substantial part of the first contact portion.
    Type: Application
    Filed: February 21, 2022
    Publication date: September 1, 2022
    Inventors: Andre Uhlemann, Christoph Koch
  • Publication number: 20220183147
    Abstract: A circuit board includes: an electrically insulating part and an electrically conductive part; at least one semiconductor chip embedded into the electrically insulating part in a part of the circuit board; and a cooling area above and below the at least one semiconductor chip. The electrically conductive part includes a first outer conductive layer on the first surface, a second outer conductive layer on the second surface, and a first inner conductive layer which is electrically connected to the semiconductor chip. The first inner conductive layer is electrically insulated from the first outer conductive layer and from the second outer conductive layer by the electrically insulating part in the cooling area, or is electrically connected to the first outer conductive layer outside the cooling area.
    Type: Application
    Filed: March 1, 2022
    Publication date: June 9, 2022
    Inventors: Tomas Manuel Reiter, Mark Nils Muenzer, Andre Uhlemann
  • Patent number: 11266012
    Abstract: A circuit board includes an electrically insulating part and an electrically conductive part. At least one semiconductor chip is embedded into the electrically insulating part in a part of the circuit board. Through openings in the part of the circuit board provide for passage of a cooling liquid. The through openings extend from a first surface of the circuit board to a second surface of the circuit board. The electrically conductive part includes a first outer conductive layer on the first surface and a second outer conductive layer on the second surface. The electrically conductive part also includes a first inner conductive layer which is electrically connected to the semiconductor chip. The first inner conductive layer is electrically insulated from the first outer conductive layer and from the second outer conductive layer by the electrically insulating part in the part of the circuit board.
    Type: Grant
    Filed: December 12, 2019
    Date of Patent: March 1, 2022
    Assignee: Infineon Technologies AG
    Inventors: Tomas Manuel Reiter, Mark Nils Muenzer, Andre Uhlemann
  • Publication number: 20210006062
    Abstract: A snubber circuit includes a snubber substrate including an electrically insulating carrier and an electrically conducting structured layer applied thereon, the electrically conducting structured layer including two segments. The snubber circuit fuither includes two electrically resistive layers, each resistive layer being applied onto the two segments of the electrically conducting structured layer of the snubber substrate, and a capacitor disposed on the electrically resistive layers and having two terminals, each terminal being electrically connected to one of the electrically resistive layers. Further, a power semiconductor module having such a snubber circuit is disclosed.
    Type: Application
    Filed: July 2, 2020
    Publication date: January 7, 2021
    Inventors: Michael Schlueter, Andre Uhlemann
  • Publication number: 20200196441
    Abstract: A circuit board includes an electrically insulating part and an electrically conductive part. At least one semiconductor chip is embedded into the electrically insulating part in a part of the circuit board. Through openings in the part of the circuit board provide for passage of a cooling liquid. The through openings extend from a first surface of the circuit board to a second surface of the circuit board. The electrically conductive part includes a first outer conductive layer on the first surface and a second outer conductive layer on the second surface. The electrically conductive part also includes a first inner conductive layer which is electrically connected to the semiconductor chip. The first inner conductive layer is electrically insulated from the first outer conductive layer and from the second outer conductive layer by the electrically insulating part in the part of the circuit board.
    Type: Application
    Filed: December 12, 2019
    Publication date: June 18, 2020
    Inventors: Tomas Manuel Reiter, Mark Nils Muenzer, Andre Uhlemann
  • Publication number: 20200183056
    Abstract: A power semiconductor module includes a first substrate, wherein the first substrate includes aluminum, a first aluminum oxide layer arranged on the first substrate, a conductive layer arranged on the first aluminum oxide layer, a first semiconductor chip, wherein the first semiconductor chip is arranged on the conductive layer and is electrically connected thereto, and an electrical insulation material enclosing the first semiconductor chip, wherein the first aluminum oxide layer is configured to electrically insulate the first semiconductor chip from the first substrate.
    Type: Application
    Filed: December 5, 2019
    Publication date: June 11, 2020
    Inventors: Ivan Nikitin, Dirk Ahlers, Andreas Grassmann, Andre Uhlemann
  • Publication number: 20170304922
    Abstract: A semiconductor module includes a substrate having a metallized first side and a metallized second side opposing the metallized first side. A semiconductor die is attached to the metallized first side of the substrate. A plurality of cooling structures are welded to the metallized second side of the substrate. Each of the cooling structures includes a plurality of distinct weld beads disposed in a stacked arrangement extending away from the substrate. The substrate can be electrically conductive or insulating. Corresponding methods of manufacturing such semiconductor modules and substrates with such welded cooling structures are also provided.
    Type: Application
    Filed: July 11, 2017
    Publication date: October 26, 2017
    Inventors: Andre Uhlemann, Alexander Herbrandt
  • Patent number: 9731370
    Abstract: A semiconductor module includes a substrate having a metallized first side and a metallized second side opposing the metallized first side. A semiconductor die is attached to the metallized first side of the substrate. A plurality of cooling structures are welded to the metallized second side of the substrate. Each of the cooling structures includes a plurality of distinct weld beads disposed in a stacked arrangement extending away from the substrate. The substrate can be electrically conductive or insulating. Corresponding methods of manufacturing such semiconductor modules and substrates with such welded cooling structures are also provided.
    Type: Grant
    Filed: April 30, 2013
    Date of Patent: August 15, 2017
    Assignee: Infineon Technologies AG
    Inventors: Andre Uhlemann, Alexander Herbrandt
  • Patent number: 9578789
    Abstract: A power semiconductor module includes a substrate and a two-part cooling system arranged under the substrate. The cooling system has upper and lower pieces. The upper piece forms a flow channel with the substrate for a cooling liquid. The upper piece has a first inflow and an outflow, through which the cooling liquid can be introduced into the flow channel and removed. The upper piece also has at least one second inflow, which is spaced apart from the first inflow in a longitudinal direction. The lower piece has an inlet and an outlet, the outlet being connected to the outflow and the inlet being connected to the first inflow. The lower piece also has a channel branching off from the inlet, which includes at least one bypass channel, which is connected to the second inflow, so part of the cooling liquid passes through the bypass channel into the flow channel.
    Type: Grant
    Filed: May 20, 2014
    Date of Patent: February 21, 2017
    Assignee: Infineon Technologies AG
    Inventors: Andre Uhlemann, Thorsten Fath
  • Patent number: 9275926
    Abstract: According to an exemplary embodiment, a power module is provided which comprises a semiconductor chip, a bonding substrate comprising an electrically conductive sheet and an electric insulator sheet which is directly attached to the electrically conductive sheet and which is thermally coupled to the semiconductor chip, and an array of cooling structures directly attached to the electrically conductive sheet and configured for removing heat from the semiconductor chip when interacting with cooling fluid.
    Type: Grant
    Filed: May 3, 2013
    Date of Patent: March 1, 2016
    Assignee: Infineon Technologies AG
    Inventors: Wolfram Hable, Andreas Grassmann, Frank Winter, Ottmar Geitner, Alexander Schwarz, Alexander Herbrandt, Lothar Koenig, Andre Uhlemann
  • Publication number: 20160056088
    Abstract: A cold plate includes a single piece member and a channel. A top side of the channel is open. A bottom side of the channel opposite the top side has an inlet and an outlet.
    Type: Application
    Filed: August 14, 2015
    Publication date: February 25, 2016
    Inventors: Andre Uhlemann, Christoph Koch, Alexander Schwarz
  • Patent number: 8963321
    Abstract: A semiconductor device includes a semiconductor chip joined with a substrate and a base plate joined with the substrate. The base plate includes a first metal layer clad to a second metal layer. The second metal layer is deformed to provide a pin-fin or fin cooling structure. The second metal layer has a sub-layer that has no pins and no pin-fins. The first metal layer has a first thickness and the sub-layer has a second thickness. The ratio between the first thickness and the second thickness is at least 4:1.
    Type: Grant
    Filed: January 24, 2013
    Date of Patent: February 24, 2015
    Assignee: Infineon Technologies AG
    Inventors: Andreas Lenniger, Andre Uhlemann, Olaf Hohlfeld
  • Publication number: 20140347818
    Abstract: A power semiconductor module includes a substrate and a two-part cooling system arranged under the substrate. The cooling system has upper and lower pieces. The upper piece forms a flow channel with the substrate for a cooling liquid. The upper piece has a first inflow and an outflow, through which the cooling liquid can be introduced into the flow channel and removed. The upper piece also has at least one second inflow, which is spaced apart from the first inflow in a longitudinal direction. The lower piece has an inlet and an outlet, the outlet being connected to the outflow and the inlet being connected to the first inflow. The lower piece also has a channel branching off from the inlet, which includes at least one bypass channel, which is connected to the second inflow, so part of the cooling liquid passes through the bypass channel into the flow channel.
    Type: Application
    Filed: May 20, 2014
    Publication date: November 27, 2014
    Inventors: Andre Uhlemann, Thorsten Fath
  • Publication number: 20140327127
    Abstract: According to an exemplary embodiment, a power module is provided which comprises a semiconductor chip, a bonding substrate comprising an electrically conductive sheet and an electric insulator sheet which is directly attached to the electrically conductive sheet and which is thermally coupled to the semiconductor chip, and an array of cooling structures directly attached to the electrically conductive sheet and configured for removing heat from the semiconductor chip when interacting with cooling fluid.
    Type: Application
    Filed: May 3, 2013
    Publication date: November 6, 2014
    Inventors: Wolfram HABLE, Andreas Grassmann, Frank Winter, Ottmar Geitner, Alexander Schwarz, Alexander Herbrandt, Lothar Koenig, Andre Uhlemann
  • Publication number: 20140321063
    Abstract: A semiconductor module includes a substrate having a metallized first side and a metallized second side opposing the metallized first side. A semiconductor die is attached to the metallized first side of the substrate. A plurality of cooling structures are welded to the metallized second side of the substrate. Each of the cooling structures includes a plurality of distinct weld beads disposed in a stacked arrangement extending away from the substrate. The substrate can be electrically conductive or insulating. Corresponding methods of manufacturing such semiconductor modules and substrates with such welded cooling structures are also provided.
    Type: Application
    Filed: April 30, 2013
    Publication date: October 30, 2014
    Inventors: Andre Uhlemann, Alexander Herbrandt