Abstract: An instrument support for a guitar including a bridge for resting on a leg of a person, the bridge lying in an x-z plane, wherein at the opposite ends of the bridge with respect to a direction x a first holder and a second holder are respectively provided for receiving the guitar, the first holder having a first holding member and a second holding member for holding the guitar, the holding members each having a nominal bearing surface with a normal, against which it is intended to bear the guitar, the first member being alignable in such a way that its normal is aligned along the y-direction, the second member being alignable in such a way that its normal is aligned along the z-direction, wherein in that the second member is aligned in such a way that its normal is aligned along the z-direction.

Abstract: A method for processing a semiconductor device in accordance with various embodiments may include: depositing a first metallization material over a semiconductor body; performing a heating process so as to form at least one region in the semiconductor body including a eutectic of the first metallization material and material of the semiconductor body; and depositing a second metallization material over the semiconductor body so as to contact the semiconductor body via the at least one region in the semiconductor body.

Abstract: A method of manufacturing a semiconductor device includes forming a profile of net doping in a drift zone of a semiconductor body by multiple irradiations with protons and generating hydrogen-related donors by annealing the semiconductor body. At least 50% of a vertical extension of the drift zone between first and second sides of the semiconductor body is undulated and includes multiple doping peak values between 1×1013 cm?3 and 5×1014 cm?3.

Abstract: A power semiconductor device includes a semiconductor substrate including at least one electrical structure. The at least one electrical structure has a blocking voltage of more than 20V. Further, the power semiconductor device includes an electrically insulating layer structure formed over at least a portion of a lateral surface of the semiconductor substrate. The electrically insulating layer structure embeds one or more local regions for storing charge carriers. Further, the one or more local regions includes in at least one direction a dimension of less than 200 nm.

Abstract: A method of manufacturing a semiconductor device includes forming a profile of net doping in a drift zone of a semiconductor body by multiple irradiations with protons and generating hydrogen-related donors by annealing the semiconductor body. At least 50% of a vertical extension of the drift zone between first and second sides of the semiconductor body is undulated and includes multiple doping peak values between 1×1013 cm?3 and 5×1014 cm?3.

Abstract: A semiconductor device includes a semiconductor body having opposite first and second sides. The semiconductor device further includes a drift zone in the semiconductor body between the second side and a pn junction. A profile of net doping of the drift zone along at least 50% of a vertical extension of the drift zone between the first and second sides is undulated and includes doping peak values between 1×1013 cm?3 and 5×1014 cm?3. A device blocking voltage Vbr is defined by a breakdown voltage of the pn junction between the drift zone and a semiconductor region of opposite conductivity type that is electrically coupled to the first side of the semiconductor body.

Abstract: A method for processing a semiconductor device in accordance with various embodiments may include: depositing a first metallization material over a semiconductor body; performing a heating process so as to form at least one region in the semiconductor body including a eutectic of the first metallization material and material of the semiconductor body; and depositing a second metallization material over the semiconductor body so as to contact the semiconductor body via the at least one region in the semiconductor body.

Abstract: A power semiconductor device includes a semiconductor substrate including at least one electrical structure. The at least one electrical structure has a blocking voltage of more than 20V. Further, the power semiconductor device includes an electrically insulating layer structure formed over at least a portion of a lateral surface of the semiconductor substrate. The electrically insulating layer structure embeds one or more local regions for storing charge carriers. Further, the one or more local regions includes in at least one direction a dimension of less than 200 nm.

Abstract: A semiconductor device includes a first semiconductor region having first charge carriers of a first conductivity type and a second semiconductor region having second charge carriers. The first semiconductor region includes a transition region in contact with the second semiconductor region, the transition region having a first concentration of the first charge carriers, a contact region having a second concentration of the first charge carriers, wherein the second concentration is higher than the first concentration, and a damage region between the contact region and the transition region. The damage region is configured for reducing lifetime and/or mobility of the first charge carriers of the damage region as compared to the lifetime and/or the mobility of the first charge carriers of the contact region and the transition region.

Abstract: A method for processing a semiconductor device in accordance with various embodiments may include: depositing a first metallization material over a semiconductor body; performing a heating process so as to form at least one region in the semiconductor body including a eutectic of the first metallization material and material of the semiconductor body; and depositing a second metallization material over the semiconductor body so as to contact the semiconductor body via the at least one region in the semiconductor body.

Abstract: A semiconductor device includes a first semiconductor region having first charge carriers of a first conductivity type and a second semiconductor region having second charge carriers. The first semiconductor region includes a transition region in contact with the second semiconductor region, the transition region having a first concentration of the first charge carriers, a contact region having a second concentration of the first charge carriers, wherein the second concentration is higher than the first concentration, and a damage region between the contact region and the transition region. The damage region is configured for reducing lifetime and/or mobility of the first charge carriers of the damage region as compared to the lifetime and/or the mobility of the first charge carriers of the contact region and the transition region.

Abstract: A semiconductor device includes a diffusion barrier layer, a first semiconductor region having first charge carriers of a first conductivity type and a second semiconductor region having second charge carriers. The first semiconductor region includes a transition region in contact with the second semiconductor region, the transition region having a first concentration of the first charge carriers, a contact region in contact with the diffusion barrier layer, the contact region having a second concentration of the first charge carriers, wherein the second concentration is higher than the first concentration, and a damage region between the contact region and the transition region. The damage region is configured for reducing the lifetime and/or the mobility of the first charge carriers of the damage region as compared to the lifetime and/or the mobility of the first charge carriers of the contact region and the transition region.

Abstract: A semiconductor diode includes a semiconductor body having opposite first and second sides. A first and a second semiconductor region are consecutively arranged along a lateral direction at the second side. The first and second semiconductor regions are of opposite first and second conductivity types and are electrically coupled to an electrode at the second side. The semiconductor diode further includes a third semiconductor region of the second conductivity type buried in the semiconductor body at a distance from the second side. The second and third semiconductor regions are separated from each other.

Abstract: A semiconductor device includes a diffusion barrier layer, a first semiconductor region having first charge carriers of a first conductivity type and a second semiconductor region having second charge carriers. The first semiconductor region includes a transition region in contact with the second semiconductor region, the transition region having a first concentration of the first charge carriers, a contact region in contact with the diffusion barrier layer, the contact region having a second concentration of the first charge carriers, wherein the second concentration is higher than the first concentration, and a damage region between the contact region and the transition region. The damage region is configured for reducing the lifetime and/or the mobility of the first charge carriers of the damage region as compared to the lifetime and/or the mobility of the first charge carriers of the contact region and the transition region.

Abstract: A method for processing a semiconductor device in accordance with various embodiments may include: depositing a first metallization material over a semiconductor body; performing a heating process so as to form at least one region in the semiconductor body including a eutectic of the first metallization material and material of the semiconductor body; and depositing a second metallization material over the semiconductor body so as to contact the semiconductor body via the at least one region in the semiconductor body.

Abstract: A semiconductor device includes a semiconductor body having opposite first and second sides. The semiconductor device further includes a drift zone in the semiconductor body between the second side and a pn junction. A profile of net doping of the drift zone along at least 50% of a vertical extension of the drift zone between the first and second sides is undulated and includes doping peak values between 1×1013 cm?3 and 5×1014 cm?3. A device blocking voltage Vbr is defined by a breakdown voltage of the pn junction between the drift zone and a semiconductor region of opposite conductivity type that is electrically coupled to the first side of the semiconductor body.

Abstract: A semiconductor diode includes a semiconductor body having opposite first and second sides. A first and a second semiconductor region are consecutively arranged along a lateral direction at the second side. The first and second semiconductor regions are of opposite first and second conductivity types and are electrically coupled to an electrode at the second side. The semiconductor diode further includes a third semiconductor region of the second conductivity type buried in the semiconductor body at a distance from the second side. The second and third semiconductor regions are separated from each other.

Abstract: The present invention relates to a device for delivering heat comprising at least one heat reservoir, and at least one electrical heating element for heating the at least one heat reservoir, wherein at least one of the at least one heat reservoir is a latent heat reservoir.