Abstract: A method of preparing a coating solution, comprising the steps of providing a first solution comprising a lower alcohol; a polyethylene glycol; a complexing agent; and water; providing a second solution comprising a higher alcohol; and at least one metal alkoxide, wherein the metal in said at least one metal alkoxide is selected from the group consisting of zirconium, aluminium, titanium, tantalum and yttrium; forming a sol-gel solution by mixing said first and second solutions and thereby hydrolyzing said at least one metal alkoxide to a metal oxide and an alcohol; forming a concentrated solution by removing said lower alcohol and the alcohol resulting from the hydrolysis of said at least one metal alkoxide; and forming a coating solution by adding a medium alcohol to said concentrated solution.

Abstract: A method of preparing a coating solution, comprising the steps of providing a first solution comprising a lower alcohol; a polyethylene glycol; a complexing agent; and water; providing a second solution comprising a higher alcohol; and at least one metal alkoxide, wherein the metal in said at least one metal alkoxide is selected from the group consisting of zirconium, aluminium, titanium, tantalum and yttrium; forming a sol-gel solution by mixing said first and second solutions and thereby hydrolyzing said at least one metal alkoxide to a metal oxide and an alcohol; forming a concentrated solution by removing said lower alcohol and the alcohol resulting from the hydrolysis of said at least one metal alkoxide; and forming a coating solution by adding a medium alcohol to said concentrated solution.

Abstract: The present invention relates to a method of fabricating a groove-like structure in a semiconductor device including etching a trench in a substrate, filling the trench with a spin-on-glass liquid forming a spin-on-glass liquid layer containing a solvent, baking the spin-on-glass liquid layer in order to remove the solvent and forming a baked layer, etching the baked layer to a predetermined depth using an etchant that provides a larger etch rate with regard to silicon than with regard to silicon nitride or silicon oxide, and, after etching the baked layer, annealing the remaining baked layer and forming a spin-on-glass oxide layer inside the trench.

Abstract: The present invention provides a fabrication method for a semiconductor structure having the steps of providing a semiconductor substrate (1); providing and patterning a silicon nitride layer (3) on the semiconductor substrate (1) as topmost layer of a trench etching mask; forming a trench (5) in a first etching step by means of the trench etching mask; conformally depositing a liner layer (10) made of silicon oxide above the resulting structure, which leaves a gap (SP) reaching into the depth in the trench (5); carrying out a V plasma etching step for forming a V profile of the line layer (10) in the trench (5); wherein the liner layer (10) is pulled back to below the top side of the silicon nitride layer (3); an etching gas mixture comprises C5F8, O2 and an inert gas is used in the V plasma etching step; the ratio (V) of C5F8/O2 lies between 2.5 and 3.5; and the selectivity of the V plasma etching step between silicon oxide and silicon nitride is at least 10.

Abstract: A method of filling high ratio trenches on a substrate is described. First, an oxidizable layer is deposited on the substrate. Thereafter, a trench fill oxide is deposited on the substrate and on the oxidizable layer. Afterwards, the resulting structure is annealed using an oxygen containing gas such that the oxidizable layer is oxidized.

Abstract: The present invention provides a fabrication method for a semiconductor structure having the steps of providing a semiconductor substrate (1); providing and patterning a silicon nitride layer (3) on the semiconductor substrate (1) as topmost layer of a trench etching mask; forming a trench (5) in a first etching step by means of the trench etching mask; conformally depositing a liner layer (10) made of silicon oxide above the resulting structure, which leaves a gap (SP) reaching into the depth in the trench (5); carrying out a V plasma etching step for forming a V profile of the line layer (10) in the trench (5); wherein the liner layer (10) is pulled back to below the top side of the silicon nitride layer (3); an etching gas mixture comprises C5F8, O2 and an inert gas is used in the V plasma etching step; the ratio (V) of C5F8/O2 lies between 2.5 and 3.5; and the selectivity of the V plasma etching step between silicon oxide and silicon nitride is at least 10.

Abstract: Method for fabricating a trench isolation structure The invention provides a method for fabricating a trench isolation structure, comprising the following steps: forming a mask (3) on a substrate (1); forming at least one trench (2) in the substrate (1) by means of the mask (3); carrying out selective deposition of a first insulation material (5) to at least partially fill the at least one trench (2) in the substrate (1) with the insulation material (5) in the presence of the mask (3); and applying a second insulation material (6) over the entire surface of the structure in order to fill the at least one trench (2) in the substrate (1) at least up to the top side of the mask (3).