Patents by Inventor Andreas Munding
Andreas Munding has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 10325783Abstract: A semiconductor device includes a substrate, a semiconductor chip, and an array of contact elements electrically coupling the substrate to the semiconductor chip. The semiconductor device includes an underfill material between the substrate and the semiconductor chip and between the contact elements. A patterned structure is arranged on the substrate and extends from under the semiconductor chip through a keep-out zone around an edge of the semiconductor chip. The patterned structure provides a reservoir for the underfill material.Type: GrantFiled: June 9, 2015Date of Patent: June 18, 2019Assignee: Infineon Technologies AGInventor: Andreas Munding
-
Patent number: 10090251Abstract: A semiconductor chip includes a semiconductor body having an active device region, one or more metallization layers insulated from the semiconductor body and configured to carry one or more of ground, power and signals to the active device region, and a plurality of contact terminals formed in or disposed on an outermost one of the metallization layers and configured to provide external electrical access to the semiconductor chip. A minimum distance between adjacent ones of the contact terminals is defined for the semiconductor chip. One or more groups of adjacent ones of the contact terminals have an electrical or functional commonality and a pitch less than the defined minimum distance. A single shared solder joint can connect two or more of the contact terminals of the semiconductor chip to one or more of contact terminals of a substrate such as a circuit board, an interposer or another semiconductor chip.Type: GrantFiled: July 24, 2015Date of Patent: October 2, 2018Assignee: Infineon Technologies AGInventors: Peter Ossimitz, Gottfried Beer, Juergen Hoegerl, Andreas Munding
-
Patent number: 10014275Abstract: One aspect of the invention relates to a method for producing a chip assemblage. Two or more chip assemblies are produced in each case by cohesively and electrically conductively connecting an electrically conductive first compensation lamina to a first main electrode of a semiconductor chip. A control electrode interconnection structure is arranged in a free space between the chip assemblies. Electrically conductive connections are produced between the control electrode interconnection structure and control electrodes of the semiconductor chips of the individual chip assemblies. The chip assemblies are cohesively connected by means of a dielectric embedding compound.Type: GrantFiled: March 15, 2017Date of Patent: July 3, 2018Assignee: Infineon Technologies AGInventors: Alexander Heinrich, Irmgard Escher-Poeppel, Martin Gruber, Andreas Munding, Catharina Wille
-
Publication number: 20170271298Abstract: One aspect of the invention relates to a method for producing a chip assemblage. Two or more chip assemblies are produced in each case by cohesively and electrically conductively connecting an electrically conductive first compensation lamina to a first main electrode of a semiconductor chip. A control electrode interconnection structure is arranged in a free space between the chip assemblies. Electrically conductive connections are produced between the control electrode interconnection structure and control electrodes of the semiconductor chips of the individual chip assemblies. The chip assemblies are cohesively connected by means of a dielectric embedding compound.Type: ApplicationFiled: March 15, 2017Publication date: September 21, 2017Applicant: Infineon Technologies AGInventors: Alexander Heinrich, Irmgard Escher-Poeppel, Martin Gruber, Andreas Munding, Catharina Wille
-
Patent number: 9653671Abstract: According to various examples, systems, methods, and devices for a light emitting device are described herein. As one example, a light emitting device includes a light emitting element and a capacitor. The capacitor is configured as a voltage buffer for the light emitting element and is further configured to dissipate heat from the light emitting element. According to another example, a carrier for a light emitting arrangement is described herein. According to this example, the carrier includes a capacitor configured to buffer a voltage of the light emitting arrangement. The carrier further includes a contacting structure configured for electrically contacting the light emitting arrangement and the capacitor. The capacitor and the contacting structure are arranged such that the capacitor is configured to dissipate heat from the light emitting arrangement.Type: GrantFiled: February 13, 2014Date of Patent: May 16, 2017Assignee: Infineon Technologies AGInventor: Andreas Munding
-
Publication number: 20170025357Abstract: A semiconductor chip includes a semiconductor body having an active device region, one or more metallization layers insulated from the semiconductor body and configured to carry one or more of ground, power and signals to the active device region, and a plurality of contact terminals formed in or disposed on an outermost one of the metallization layers and configured to provide external electrical access to the semiconductor chip. A minimum distance between adjacent ones of the contact terminals is defined for the semiconductor chip. One or more groups of adjacent ones of the contact terminals have an electrical or functional commonality and a pitch less than the defined minimum distance. A single shared solder joint can connect two or more of the contact terminals of the semiconductor chip to one or more of contact terminals of a substrate such as a circuit board, an interposer or another semiconductor chip.Type: ApplicationFiled: July 24, 2015Publication date: January 26, 2017Inventors: Peter Ossimitz, Gottfried Beer, Juergen Hoegerl, Andreas Munding
-
Publication number: 20170014795Abstract: This invention relates to an apparatus, comprising: a plurality of plates in a stack defining at least one process layer and at least one heat exchange layer, each plate having a peripheral edge, the peripheral edge of each plate being welded to the peripheral edge of the next adjacent plate to provide a perimeter seal for the stack, the ratio of the average surface area of each of the adjacent plates to the average penetration of the weld between the adjacent plates being at least about 100 cm2/mm. The stack may be used as the core assembly for a microchannel processor. The microchannel processor may be used for conducting one or more unit operations, including chemical reactions such as SMR reactions.Type: ApplicationFiled: September 19, 2016Publication date: January 19, 2017Inventors: Anna Lee Tonkovich, Thomas Yuschak, Kai Tod Paul Jarosch, Paul Neagle, Bin Yang, Ravi Arora, Jeffrey Marco, Jennifer Marco, Barry L. Yang, Andreas Munding, Sara Kampfe
-
Patent number: 9524932Abstract: Semiconductor chips are described that combine a semiconductor device and a capacitor onto a single substrate such that the semiconductor device and the capacitor are electrically isolated from each other. In one example, a semiconductor chip includes a substrate having a first side and a second side, wherein the second side is opposite the first side. The semiconductor chip further includes a semiconductor device formed on the first side of the substrate and an electrically insulating layer formed on at least a portion of the second side of the substrate. The semiconductor chip further includes a capacitor device formed on at least a portion of the electrically insulating layer on the second side of the substrate, wherein the capacitor device is electrically insulated from the semiconductor device.Type: GrantFiled: July 2, 2015Date of Patent: December 20, 2016Assignee: Infineon Technologies Austria AGInventors: Andreas Munding, Martin Gruber
-
Publication number: 20160365258Abstract: A semiconductor device includes a substrate, a semiconductor chip, and an array of contact elements electrically coupling the substrate to the semiconductor chip. The semiconductor device includes an underfill material between the substrate and the semiconductor chip and between the contact elements. A patterned structure is arranged on the substrate and extends from under the semiconductor chip through a keep-out zone around an edge of the semiconductor chip. The patterned structure provides a reservoir for the underfill material.Type: ApplicationFiled: June 9, 2015Publication date: December 15, 2016Applicant: Infineon Technologies AGInventor: Andreas Munding
-
Publication number: 20150311149Abstract: Semiconductor chips are described that combine a semiconductor device and a capacitor onto a single substrate such that the semiconductor device and the capacitor are electrically isolated from each other. In one example, a semiconductor chip includes a substrate having a first side and a second side, wherein the second side is opposite the first side. The semiconductor chip further includes a semiconductor device formed on the first side of the substrate and an electrically insulating layer formed on at least a portion of the second side of the substrate. The semiconductor chip further includes a capacitor device formed on at least a portion of the electrically insulating layer on the second side of the substrate, wherein the capacitor device is electrically insulated from the semiconductor device.Type: ApplicationFiled: July 2, 2015Publication date: October 29, 2015Inventors: Andreas Munding, Martin Gruber
-
Patent number: 9123735Abstract: Semiconductor chips are described that combine a semiconductor device and a capacitor onto a single substrate such that the semiconductor device and the capacitor are electrically isolated from each other. In one example, a semiconductor chip includes a substrate having a first side and a second side, wherein the second side is opposite the first side. The semiconductor chip further includes a semiconductor device formed on the first side of the substrate and an electrically insulating layer formed on at least a portion of the second side of the substrate. The semiconductor chip further includes a capacitor device formed on at least a portion of the electrically insulating layer on the second side of the substrate, wherein the capacitor device is electrically insulated from the semiconductor device.Type: GrantFiled: July 31, 2013Date of Patent: September 1, 2015Assignee: Infineon Technologies Austria AGInventors: Andreas Munding, Martin Gruber
-
Publication number: 20150228878Abstract: According to various examples, systems, methods, and devices for a light emitting device are described herein. As one example, a light emitting device includes a light emitting element and a capacitor. The capacitor is configured as a voltage buffer for the light emitting element and is further configured to dissipate heat from the light emitting element. According to another example, a carrier for a light emitting arrangement is described herein. According to this example, the carrier includes a capacitor configured to buffer a voltage of the light emitting arrangement. The carrier further includes a contacting structure configured for electrically contacting the light emitting arrangement and the capacitor. The capacitor and the contacting structure are arranged such that the capacitor is configured to dissipate heat from the light emitting arrangement.Type: ApplicationFiled: February 13, 2014Publication date: August 13, 2015Applicant: Infineon Technologies AGInventor: Andreas MUNDING
-
Publication number: 20150034995Abstract: Semiconductor chips are described that combine a semiconductor device and a capacitor onto a single substrate such that the semiconductor device and the capacitor are electrically isolated from each other. In one example, a semiconductor chip includes a substrate having a first side and a second side, wherein the second side is opposite the first side. The semiconductor chip further includes a semiconductor device formed on the first side of the substrate and an electrically insulating layer formed on at least a portion of the second side of the substrate. The semiconductor chip further includes a capacitor device formed on at least a portion of the electrically insulating layer on the second side of the substrate, wherein the capacitor device is electrically insulated from the semiconductor device.Type: ApplicationFiled: July 31, 2013Publication date: February 5, 2015Applicant: Infineon Technologies Austria AGInventors: Andreas Munding, Martin Gruber
-
Publication number: 20120095268Abstract: This invention relates to an apparatus, comprising: a plurality of plates in a stack defining at least one process layer and at least one heat exchange layer, each plate having a peripheral edge, the peripheral edge of each plate being welded to the peripheral edge of the next adjacent plate to provide a perimeter seal for the stack, the ratio of the average surface area of each of the adjacent plates to the average penetration of the weld between the adjacent plates being at least about 100 cm2/mm. The stack may be used as the core assembly for a microchannel processor. The microchannel processor may be used for conducting one or more unit operations, including chemical reactions such as SMR reactions.Type: ApplicationFiled: October 18, 2011Publication date: April 19, 2012Inventors: Anna Lee Tonkovich, Thomas Yuschak, Kai Tod Paul Jarosch, Paul Neagle, Bin Yang, Ravi Arora, Jeffrey Marco, Jennifer Marco, Barry L. Yang, Andreas Munding, Sara Kampfe