Abstract: In order to generate a clock signal (fT1) that is coupled to a reference signal (FBAS), especially to an analog video signal, a free-running clock pulse (fT1) is generated from a high-frequency clock pulse (f0) and the reference signal (FBAS) is digitized therewith. In addition, a second clock pulse (fT1) is generated from the high-frequency clock pulse (f0) and the phase deviation between the first clock pulse (fT2) and the second clock pulse (fT1) is determined. The digitized sampling values of the reference signal (FBAS) at the first clock frequency (fT1) are converted, according to the phase deviation determined, into corresponding digitized sampling values having the second clock frequency (fT1) and are used as a target specification for generating the second clock pulse (fT1) thus coupled to the reference signal.

Abstract: In order to generate a clock signal (fT1) that is coupled to a reference signal (FBAS), especially to an analog video signal, a free-running clock pulse (fT1) is generated from a high-frequency clock pulse (f0) and the reference signal (FBAS) is digitized therewith. In addition, a second clock pulse (fT1) is generated from the high-frequency clock pulse (f0) and the phase deviation between the first clock pulse (fT2) and the second clock pulse (fT1) is determined. The digitized sampling values of the reference signal (FBAS) at the first clock frequency (fT1) are converted, according to the phase deviation determined, into corresponding digitized sampling values having the second clock frequency (fT1) and are used as a target specification for generating the second clock pulse (fT1) thus coupled to the reference signal.