Patents by Inventor Andreas Schulten

Andreas Schulten has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method, apparatus, and system for high speed data transfer between electronic devices
    Patent number: 7013407
    Abstract: According to one aspect of the invention, a method is provided in which a plurality of data signals are transmitted in parallel mode via a parallel bus from a first device to a second device. Phase information of each data signal received at the second device is detected against a corresponding clock signal. The phase information is sent from the second device to the first device. At the first device, an output delay of each data signal is adjusted based on the phase information received from the second device.
    Type: Grant
    Filed: January 3, 2002
    Date of Patent: March 14, 2006
    Assignee: Intel Corporation
    Inventors: Henrik I. Johansen, Franz Olbrich, Sebastian Steibl, Andreas Schulten
  • Data link analyzer
    Publication number: 20040047408
    Abstract: A system and method of evaluating transmission errors in data received at a sink device are described. The sink device may receive a test data sequence on each of a plurality of data lanes and detect transmission errors associated with specific data lanes. The sink device may then output data representative of at least some of the detected transmission errors in association with at least one of a data interval and a data lane.
    Type: Application
    Filed: September 10, 2002
    Publication date: March 11, 2004
    Inventors: Ingo Koenenkamp, Andreas Schulten
  • Method, apparatus, and system for high speed data transfer between electronic devices
    Publication number: 20030126489
    Abstract: According to one aspect of the invention, a method is provided in which a plurality of data signals are transmitted in parallel mode via a parallel bus from a first device to a second device. Phase information of each data signal received at the second device is detected against a corresponding clock signal. The phase information is sent from the second device to the first device. At the first device, an output delay of each data signal is adjusted based on the phase information received from the second device.
    Type: Application
    Filed: January 3, 2002
    Publication date: July 3, 2003
    Inventors: Henrik I. Johansen, Franz Olbrich, Sebastian Steibl, Andreas Schulten