Abstract: A memory arrangement having a memory area with a plurality of memory locations, to which external addresses can be allocated, and an address decoder which is coupled to the memory area and which includes an address input for applying an external address. The address decoder can be switched so that one of the external addresses of an address range is allocated to each memory location of the memory area, or that one of the external addresses of a sub-address range of the address range is allocated to each memory location only within a part-memory area of the memory area. The address decoder is also arranged for identifying the memory location allocated to the external address applied.

Abstract: Device for storing a binary state defined by a first binary value and a second binary value complementary thereto, the device capable of being queried by a query signal so as to output, in dependence on a binary masking state, the first binary value at a first output and the second binary value at a second output or vice versa.

Abstract: The present invention discloses a method for the online determination of a bulge/upset dimension xST and rivet head end position K of a rivet 3 with a length L in a punch rivet process with the help of a moveable punch 10 and a rigid die 20. The path covered by the punch 10 and the force applied by it are determined and evaluated online during the joining process. The quality characteristics of the joint connection are determined with the help of defined threshold values or a graphical evaluation of force/path data of the joining process.

Abstract: A method for the protected transmission of data words involves provision of a first data word (X1), transformation of the first data word (X1) into a sequence comprising at least one second data word (X2) by a first transformation rule (T1), transformation of at least one of the second data words (X2) into a third data word (X3) by a second transformation rule (T2), and checking whether a prescribed relationship exists between the third data word (X3) and a comparison data word (VX).

Abstract: Method for protected transmission of data words includes providing a first data word, transforming the first data word into a sequence including at least one second data word using a first transformation rule, transforming at least one of the second data words into a third data word using a second transformation rule, and checking whether a prescribed relationship exists between the third data word and a comparison data word.

Abstract: A memory arrangement having a memory area with a plurality of memory locations, to which external addresses can be allocated, and an address decoder which is coupled to the memory area and which includes an address input for applying an external address. The address decoder can be switched so that one of the external addresses of an address range is allocated to each memory location of the memory area, or that one of the external addresses of a sub-address range of the address range is allocated to each memory location only within a part-memory area of the memory area. The address decoder is also arranged for identifying the memory location allocated to the external address applied.

Abstract: A controller has a receiver for receiving an instruction, the instruction being an executable instruction or a wildcard instruction. A decoder is formed to output a control signal corresponding to the executable instruction responsive to an executable instruction, and to output a switch signal responsive to a received wildcard instruction. Additionally, the controller has a provider for providing a predetermined substitute control signal outputting the predetermined substitute control signal depending on the switch signal.

Abstract: A controller having a receiver for receiving an instruction, a comparator for comparing the received instruction to a predetermined wildcard instruction, the comparator providing a switch signal to a provider for providing a predetermined substitution instruction responsive to the predetermined wildcard instruction. Depending on the switch signal, the provider outputs the received instruction or the other instruction.

Abstract: Device for determining a result includes a unit for determining a first and a second intermediate result, wherein the result depends on the first and the second intermediate result, and a unit for randomly determining a sequence in which the unit for determining executes the determination of the first and the second intermediate result.

Abstract: An integrated circuit having first connections, a first memory cell, first and second prechargers, and first and second data transmission devices. The first connections have a dual-rail signal applied thereto. The first memory cell is connected to the first connections and buffer-stores the dual-rail signal applied to the first connections. The first precharger precharges first lines, which are connected to the first connections. The first data transmission device, which forwards the dual-rail signal stored in the first memory cell to second connections, which are connected to a second memory cell which transmits the dual-rail signal to the first connections again using the second data transmission device. The second precharger precharges second lines, which are connected to the second connections.

Abstract: A semiconductor chip is characterized in that some of the contact points for connecting the semiconductor chip to other components of a system that contains the chip is provided for making a connection with another semiconductor chip that can be mounted onto the first semiconductor chip and that enhances the functions and/or the power of the latter. Such a configuration allows a small semiconductor chip to be produced in a cost-effective manner, using minimal resources and the chip can be enhanced by any number of modules, without modifying the characteristics of the system, in which it is contained.

Abstract: An integrated circuit having first connections, a first memory cell, first and second prechargers, and first and second data transmission devices. The first connections have a dual-rail signal applied thereto. The first memory cell is connected to the first connections and buffer-stores the dual-rail signal applied to the first connections. The first precharger precharges first lines, which are connected to the first connections. The first data transmission device, which forwards the dual-rail signal stored in the first memory cell to second connections, which are connected to a second memory cell which transmits the dual-rail signal to the first connections again using the second data transmission device. The second precharger precharges second lines, which are connected to the second connections.

Abstract: The present invention relates to electronic packaging and a method for manufacturing the same. According to an embodiment of the present invention, an emulator chip package is designed and assembled such that a bottom portion of the emulator chip package is approximately the same electronic package used to package the target chip. Additionally, a top portion of the emulator chip package is approximately a slightly modified version of the same type of package used to package the target chip. According to an embodiment of the present invention, the top portion of the emulator chip package is attached to the bottom portion of the emulator chip package. The lead connector pins of the top portion of the package preferably leads up, while the connector pins of the bottom portion of the package preferably leads down.

Abstract: Apparatus for addressing a data memory (21), with the apparatus (1) having:

Abstract: A semiconductor chip is characterized in that some of the contact points for connecting the semiconductor chip to other components of a system that contains the chip is provided for making a connection with another semiconductor chip that can be mounted onto the first semiconductor chip and that enhances the functions and/or the power of the latter. Such a configuration allows a small semiconductor chip to be produced in a cost-effective manner, using minimal resources and the chip can be enhanced by any number of modules, without modifying the characteristics of the system, in which it is contained.

Abstract: An on-chip debug system includes a data band selector operable to transmit to an emulator the selected data bands generated by the selected components in an integrated circuit. The data band selector is directed by the emulator based upon instructions received from a host computer.

Abstract: An improved on chip debug system is disclosed. The on chip debug system includes a data band selector arranged to selectively transmit particular data bands generated by a processor included in an integrated circuit as needed to an emulator. The data band selector is directed by the emulator based upon instructions received from a host computer.

Abstract: A multi-master bus system and a method for operating the same. The invention is characterized by a default master determination that can be dynamically modified, thereby facilitating an optimum adaptation of the bus system to the respective conditions irrespective of the circumstances. The system including the bus system can thus be quickly and efficiently operated in an optimum manner.

Abstract: A method and an apparatus for operating a circulating memory that can be addressed by a write pointer and/or a read pointer are disclosed. The method and the apparatus are distinguished by the fact that a jump of the write pointer and/or of the read pointer from the end of the memory to the beginning of the memory and/or vice versa is signaled.

Abstract: The ski boot comprises a lower shell (1) with which a rear portion (2) of the shaft and a front portion (3) of the shaft are connected so as to be articulated. The lower shell (1) comprises a cut out portion (7) in the rear in the area which is provided for enclosing the lower leg, an insert piece (8) which is arranged at the rear portion (2) of the shaft being insertable in the cut out portion (7). The inclination position of the rear portion (2) of the shaft, and accordingly the inclination position of the entire shaft, can be determined by means of the cooperation of the flanks (7a, 8a) of the cut out portion (7) and the insert piece (8) which extend in the longitudinal direction of the shaft, which inclination position can be varied by means of insert pieces (8) having different radian measures. A clamping device (10, 11) which, in addition to a heel pull (17, 18), is supported at the lower shell (1) serves to fix this inclination position.