Abstract: Embodiments disclosed herein include electronic package and methods of forming such packages. In an embodiment, an electronic package comprises a mold layer and a first die embedded in the mold layer. In an embodiment, the first die comprises first pads at a first pitch and second pads at a second pitch. In an embodiment, the electronic package further comprises a second die embedded in the mold layer, where the second die comprises third pads at the first pitch and fourth pads at the second pitch. In an embodiment, a bridge die is embedded in the mold layer, and the bridge die electrically couples the second pads to the fourth pads.

Abstract: Embodiments are generally directed to package stacking using chip to wafer bonding. An embodiment of a device includes a first stacked layer including one or more semiconductor dies, components or both, the first stacked layer further including a first dielectric layer, the first stacked layer being thinned to a first thickness; and a second stacked layer of one or more semiconductor dies, components, or both, the second stacked layer further including a second dielectric layer, the second stacked layer being fabricated on the first stacked layer.

Abstract: Methods for centralized access control for cloud relational database management system resources are performed by systems and devices. The methods utilize a central policy storage, managed externally to database servers, which stores external policies for access to internal database resources at up to fine granularity. Database servers in the processing system each receive external access policies that correspond to users of the system by push or pull operations from the central policy storage, and store the external access policies in a cache of the database servers for databases. For resource access, access conditions are determined via policy engines of database servers based on an external access policy in the cache that corresponds to a user, responsive to a resource access request from a device of the user specifying the internal resource. Data associated with the resource is provided to the user based on the access condition being met.

Abstract: Embodiments include semiconductor packages and methods of forming the semiconductor packages. A semiconductor package includes a die over a substrate, a first conductive layer over the die, and a conductive cavity antenna over the first conductive layer and substrate. The conductive cavity antenna includes a conductive cavity, a cavity region, and a plurality of interconnects. The conductive cavity is over the first conductive layer and surrounds the cavity region. The semiconductor package also includes a second conductive layer over the conductive cavity antenna, first conductive layer, and substrate. The conductive cavity extends vertically from the first conductive layer to the second conductive layer. The cavity region may be embedded with the conductive cavity, the first conductive layer, and the second conductive layer. The plurality of interconnects may include first, second, and third interconnects.

Abstract: A semiconductor package includes a first semiconductor die, a semiconductor device comprising a second semiconductor die, and one or more wire bond structures. The wire bond structure includes a bond interface portion. The wire bond structure is arranged next to the first semiconductor die. The first semiconductor die and the bond interface portion of the wire bond structure are arranged at the same side of the semiconductor device. An interface contact structure of the semiconductor device is electrically connected to the wire bond structure.

Abstract: Embodiments include semiconductor packages and methods of forming the semiconductor packages. A semiconductor package includes a die over a substrate, a first conductive layer over the die, and a cavity resonator antenna over the first conductive layer and substrate. The cavity resonator antenna includes a conductive cavity, a cavity region, and a plurality of interconnects. The conductive cavity is over the first conductive layer and surrounds the cavity region. The semiconductor package also includes a second conductive layer over the cavity resonator antenna, first conductive layer, and substrate. The conductive cavity may extend vertically from the first conductive layer to the second conductive layer. The cavity region may be embedded with the conductive cavity, the first conductive layer, and the second conductive layer. The plurality of interconnects may include first, second, and third interconnects.

Abstract: A package on a die having a low resistive substrate, wherein the package comprises an inductor on low-k dielectric and a capacitor on high-k dielectric. The stacked arrangement having different dielectric materials may provide an inductor having a high Q-factor while still having a high capacitance density. In addition, moving the inductor from the die to the package and fabricating the high density capacitor on the package reduces the silicon area required permitting smaller RF/analog blocks on the chip.

Abstract: Methods for centralized access control for cloud relational database management system resources are performed by systems and devices. The methods utilize a central policy storage, managed externally to database servers, which stores external policies for access to internal database resources at up to fine granularity. Database servers in the processing system each receive external access policies that correspond to users of the system by push or pull operations from the central policy storage, and store the external access policies in a cache of the database servers for databases. For resource access, access conditions are determined via policy engines of database servers based on an external access policy in the cache that corresponds to a user, responsive to a resource access request from a device of the user specifying the internal resource. Data associated with the resource is provided to the user based on the access condition being met.

Abstract: In accordance with disclosed embodiments, there are provided methods, systems, and apparatuses for implementing reduced height semiconductor packages for mobile electronics. For instance, there is disclosed in accordance with one embodiment a stacked die package having therein a bottom functional silicon die; a recess formed within the bottom functional silicon die by a thinning etch partially reducing a vertical height of the bottom functional silicon die at the recess; and a top component positioned at least partially within the recess formed within the bottom functional silicon die. Other related embodiments are disclosed.

Abstract: A patch antenna array is fabricated with a package-on-package setup that contains a transceiver. The patch antenna array has a footprint that intersects the transceiver footprint. The package-on-package setup includes through-mold vias that couple to a redistribution layer disposed between the patch antennas and the package-on-package setup.

Abstract: Present disclosure relates to IC devices with thermal mitigation structures in the form of metal structures provided in a semiconductor material of a substrate on which active electronic devices are integrated (i.e., front-end metal structures). In one aspect, an IC device includes a substrate having a first face and a second face, where at least one active electronic device is integrated at the first face of the substrate. The IC device further includes at least one front-end metal structure that extends from the first face of the substrate into the substrate to a depth that is smaller than a distance between the first face and the second face. Providing front-end metal structures may enable improved cooling options because such structures may be placed in closer vicinity to the active electronic devices, compared to conventional thermal mitigation approaches.

Abstract: A patch antenna array is fabricated with a package-on-package setup that contains a transceiver. The patch antenna array has a footprint that intersects the transceiver footprint. The package-on-package setup includes through-mold vias that couple to a redistribution layer disposed between the patch antennas and the package-on-package setup.

Abstract: Embodiments disclosed herein include electronic package and methods of forming such packages. In an embodiment, an electronic package comprises a mold layer and a first die embedded in the mold layer. In an embodiment, the first die comprises first pads at a first pitch and second pads at a second pitch. In an embodiment, the electronic package further comprises a second die embedded in the mold layer, where the second die comprises third pads at the first pitch and fourth pads at the second pitch. In an embodiment, a bridge die is embedded in the mold layer, and the bridge die electrically couples the second pads to the fourth pads.

Abstract: Embodiments of the invention include a microelectronic device and methods of forming a microelectronic device. In an embodiment the microelectronic device includes a semiconductor die and an inductor that is electrically coupled to the semiconductor die. The inductor may include one or more conductive coils that extend away from a surface of the semiconductor die. In an embodiment each conductive coils may include a plurality of traces. For example, a first trace and a third trace may be formed over a first dielectric layer and a second trace may be formed over a second dielectric layer and over a core. A first via through the second dielectric layer may couple the first trace to the second trace, and a second via through the second dielectric layer may couple the second trace to the third trace.

Abstract: Embodiments are generally directed to package stacking using chip to wafer bonding. An embodiment of a device includes a first stacked layer including one or more semiconductor dies, components or both, the first stacked layer further including a first dielectric layer, the first stacked layer being thinned to a first thickness; and a second stacked layer of one or more semiconductor dies, components, or both, the second stacked layer further including a second dielectric layer, the second stacked layer being fabricated on the first stacked layer.

Abstract: A system-in-package apparatus includes a semiconductive bridge that uses bare-die pillars to couple with a semiconductive device such as a processor die. The apparatus achieves a thin form factor.

Abstract: Embodiments of the invention include a microelectronic device and methods of forming a microelectronic device. In an embodiment the microelectronic device includes a semiconductor die and an inductor that is electrically coupled to the semiconductor die. The inductor may include one or more conductive coils that extend away from a surface of the semiconductor die. In an embodiment each conductive coils may include a plurality of traces. For example, a first trace and a third trace may be formed over a first dielectric layer and a second trace may be formed over a second dielectric layer and over a core. A first via through the second dielectric layer may couple the first trace to the second trace, and a second via through the second dielectric layer may couple the second trace to the third trace.

Abstract: Embodiments are generally directed to package stacking using chip to wafer bonding. An embodiment of a device includes a first stacked layer including one or more semiconductor dies, components or both, the first stacked layer further including a first dielectric layer, the first stacked layer being thinned to a first thickness; and a second stacked layer of one or more semiconductor dies, components, or both, the second stacked layer further including a second dielectric layer, the second stacked layer being fabricated on the first stacked layer.

Abstract: Electronics devices, having vertical and lateral redistribution interconnects, are disclosed. An electronics device comprises an electronics component (e.g., die, substrate, integrated device, etc.), a die(s), and a separately formed redistribution connection layer electrically coupling the die(s) to the electronics component. The redistribution connection layer comprises dielectric layers on either side of at least one redistribution layer. The dielectric layers comprise openings that expose contact pads of the at least one redistribution layer for electrically coupling die(s) and components to each other via the redistribution connection layer. The redistribution connection layer is flexible and wrap/folded around side edges of die(s) to minimize vertical vias. Various devices and associated processes are provided.

Abstract: The present disclosure is directed to systems and methods for fabricating a semiconductor inductor that includes a coil deposited on a stop layer that is deposited on a sacrificial substrate. The semiconductor inductor may be fabricated on a silicon wafer and singulated. The sacrificial substrate beneficially provides structural support for the singulated semiconductor inductor. The singulated semiconductor inductor advantageously requires minimal active die surface area. The removal of the sacrificial substrate after coupling to the active die beneficially reduces the overall thickness (or height) of the semiconductor package, providing a decided advantage in low profile, portable, electronic devices.