Patents by Inventor Andrew Cockburn
Andrew Cockburn has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230169534Abstract: Method and systems, including a computer program product, for segmenting customers. A customer is selected from a set of customers associated with a merchant. A propensity to refer score is determined for the selected customer. The customer is associated with a customer segment among two or more customer segments. The associating is done at least in part based on the propensity to refer score. A customized message is provided to the customers in at least one customer segment.Type: ApplicationFiled: October 21, 2022Publication date: June 1, 2023Inventors: Timothy James Boughton, Andrew Cockburn
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Patent number: 10930472Abstract: Methods and apparatus for forming a metal silicide as nanowires for back-end interconnection structures for semiconductor applications are provided. In one embodiment, the method includes forming a metal silicide layer on a substrate by a chemical vapor deposition process or a physical vapor deposition process, thermal treating the metal silicide layer in a processing chamber, applying a microwave power in the processing chamber while thermal treating the metal silicide layer; and maintaining a substrate temperature less than 400 degrees Celsius while thermal treating the metal silicide layer. In another embodiment, a method includes supplying a deposition gas mixture including at least a metal containing precursor and a reacting gas on a surface of a substrate, forming a plasma in the presence of the deposition gas mixture by exposure to microwave power, exposing the plasma to light radiation, and forming a metal silicide layer on the substrate from the deposition gas.Type: GrantFiled: January 17, 2019Date of Patent: February 23, 2021Assignee: Applied Materials, Inc.Inventors: Bencherki Mebarki, Annamalai Lakshmanan, Kaushal K. Singh, Andrew Cockburn, Ludovic Godet, Paul F. Ma, Mehul B. Naik
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Patent number: 10593592Abstract: Methods and apparatus for forming a metal silicide as nanowires for back-end interconnection structures for semiconductor applications are provided. In one embodiment, the method includes forming a metal silicide stack comprising as plurality of metal silicide layers on a substrate by a chemical vapor deposition process or a physical vapor deposition process, thermal treating the metal silicide stack in a processing chamber, applying a microwave power in the processing chamber while thermal treating the metal silicide layer; and maintaining a substrate temperature less than 400 degrees Celsius while thermal treating the metal silicide layer.Type: GrantFiled: December 18, 2015Date of Patent: March 17, 2020Assignee: APPLIED MATERIALS, INC.Inventors: Bencherki Mebarki, Annamalai Lakshmanan, Kaushal K. Singh, Paul F. Ma, Mehul B. Naik, Andrew Cockburn, Ludovic Godet
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Publication number: 20190172686Abstract: Methods and apparatus for forming a metal silicide as nanowires for back-end interconnection structures for semiconductor applications are provided. In one embodiment, the method includes forming a metal silicide layer on a substrate by a chemical vapor deposition process or a physical vapor deposition process, thermal treating the metal silicide layer in a processing chamber, applying a microwave power in the processing chamber while thermal treating the metal silicide layer; and maintaining a substrate temperature less than 400 degrees Celsius while thermal treating the metal silicide layer. In another embodiment, a method includes supplying a deposition gas mixture including at least a metal containing precursor and a reacting gas on a surface of a substrate, forming a plasma in the presence of the deposition gas mixture by exposure to microwave power, exposing the plasma to light radiation, and forming a metal silicide layer on the substrate from the deposition gas.Type: ApplicationFiled: January 17, 2019Publication date: June 6, 2019Inventors: Bencherki MEBARKI, Annamalai LAKSHMANAN, Kaushal K. SINGH, Andrew COCKBURN, Ludovic GODET, Paul F. MA, Mehul B. NAIK
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Patent number: 10204764Abstract: Methods and apparatus for forming a metal silicide as nanowires for back-end interconnection structures for semiconductor applications are provided. In one embodiment, the method includes forming a metal silicide layer on a substrate by a chemical vapor deposition process or a physical vapor deposition process, thermal treating the metal silicide layer in a processing chamber, applying a microwave power in the processing chamber while thermal treating the metal silicide layer; and maintaining a substrate temperature less than 400 degrees Celsius while thermal treating the metal silicide layer. In another embodiment, a method includes supplying a deposition gas mixture including at least a metal containing precursor and a reacting gas on a surface of a substrate, forming a plasma in the presence of the deposition gas mixture by exposure to microwave power, exposing the plasma to light radiation, and forming a metal silicide layer on the substrate from the deposition gas.Type: GrantFiled: October 28, 2014Date of Patent: February 12, 2019Assignee: Applied Materials, Inc.Inventors: Bencherki Mebarki, Annamalai Lakshmanan, Kaushal K. Singh, Andrew Cockburn, Ludovic Godet, Paul F. Ma, Mehul Naik
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Patent number: 10189033Abstract: A process and apparatus are disclosed for the deposition of a layer of a first material onto a substrate of a second material. Powder particles of the first material are entrained into a carrier gas flow to form a powder beam directed to impinge on the substrate. This defines a powder beam footprint region at the substrate. The powder beam and the substrate are moved relative to each other to move the powder beam footprint relative to the substrate, thereby to deposit the layer of the first material. A laser is operated to cause direct, local heating of at least one of a forward substrate region and a powder beam footprint region. The laser beam direction is defined with reference to a plane coincident with or tangential to a surface of the substrate at the center of the laser beam footprint in terms of an elevation angle from the plane to the laser beam direction and in terms of an acute azimuthal angle from the movement direction to the laser beam direction.Type: GrantFiled: October 26, 2012Date of Patent: January 29, 2019Assignee: Laser Fusion Technologies Ltd.Inventors: Martin Sparkes, William O'Neill, Andrew Cockburn, Rocco Lupoi, Matthew Bray
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Patent number: 9613859Abstract: Methods for direct deposition of a metal silicide nanowire for back-end interconnection structures for semiconductor applications are provided. In one embodiment, the method includes positioning a substrate in a processing region of a process chamber, the substrate having a first surface comprising a non-dielectric material; and a dielectric layer formed on the first surface. An opening is formed in the dielectric layer, the opening exposing at least a portion of the first surface, the opening having sidewalls. A metal silicide seed is deposited in the opening using a PVD process, wherein the PVD process is performed with either no bias or a bias which creates deposition on the sidewall which is less than 1% of the deposition on the first surface. A metal silicide layer is then selectively deposited on the metal silicide seed using a metal-silicon organic precursor, creating the metal silicide nanowire.Type: GrantFiled: December 18, 2015Date of Patent: April 4, 2017Assignee: APPLIED MATERIALS, INC.Inventors: Annamalai Lakshmanan, Bencherki Mebarki, Kaushal K. Singh, Paul F. Ma, Mehul B. Naik, Andrew Cockburn, Ludovic Godet
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Publication number: 20160204029Abstract: Methods and apparatus for forming a metal silicide as nanowires for back-end interconnection structures for semiconductor applications are provided. In one embodiment, the method includes forming a metal silicide stack comprising as plurality of metal silicide layers on a substrate by a chemical vapor deposition process or a physical vapor deposition process, thermal treating the metal silicide stack in a processing chamber, applying a microwave power in the processing chamber while thermal treating the metal silicide layer; and maintaining a substrate temperature less than 400 degrees Celsius while thermal treating the metal silicide layer.Type: ApplicationFiled: December 18, 2015Publication date: July 14, 2016Inventors: Bencherki MEBARKI, Annamalai LAKSHMANAN, Kaushal K. SINGH, Paul F. MA, Mehul B. NAIK, Andrew COCKBURN, Ludovic GODET
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Publication number: 20160204027Abstract: Methods for direct deposition of a metal silicide nanowire for back-end interconnection structures for semiconductor applications are provided. In one embodiment, the method includes positioning a substrate in a processing region of a process chamber, the substrate having a first surface comprising a non-dielectric material; and a dielectric layer formed on the first surface. An opening is formed in the dielectric layer, the opening exposing at least a portion of the first surface, the opening having sidewalls. A metal silicide seed is deposited in the opening using a PVD process, wherein the PVD process is performed with either no bias or a bias which creates deposition on the sidewall which is less than 1% of the deposition on the first surface. A metal silicide layer is then selectively deposited on the metal silicide seed using a metal-silicon organic precursor, creating the metal silicide nanowire.Type: ApplicationFiled: December 18, 2015Publication date: July 14, 2016Inventors: Annamalai LAKSHMANAN, Bencherki MEBARKI, Kaushal K. SINGH, Paul F. MA, Mehul B. NAIK, Andrew COCKBURN, Ludovic GODET
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Publication number: 20160118260Abstract: Methods and apparatus for forming a metal silicide as nanowires for back-end interconnection structures for semiconductor applications are provided. In one embodiment, the method includes forming a metal silicide layer on a substrate by a chemical vapor deposition process or a physical vapor deposition process, thermal treating the metal silicide layer in a processing chamber, applying a microwave power in the processing chamber while thermal treating the metal silicide layer; and maintaining a substrate temperature less than 400 degrees Celsius while thermal treating the metal silicide layer. In another embodiment, a method includes supplying a deposition gas mixture including at least a metal containing precursor and a reacting gas on a surface of a substrate, forming a plasma in the presence of the deposition gas mixture by exposure to microwave power, exposing the plasma to light radiation, and forming a metal silicide layer on the substrate from the deposition gas.Type: ApplicationFiled: October 28, 2014Publication date: April 28, 2016Inventors: Bencherki MEBARKI, Annamalai LAKSHMANAN, Kaushal K. SINGH, Andrew COCKBURN, Ludovic GODET, Paul F. MA, Mehul NAIK
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Publication number: 20140295103Abstract: A process and apparatus are disclosed for the deposition of a layer of a first material onto a substrate of a second material. Powder particles of the first material are entrained into a carrier gas flow to form a powder beam directed to impinge on the substrate. This defines a powder beam footprint region at the substrate. The powder beam and the substrate are moved relative to each other to move the powder beam footprint relative to the substrate, thereby to deposit the layer of the first material. A laser is operated to cause direct, local heating of at least one of a forward substrate region and a powder beam footprint region. The laser is controlled to provide a spatial temperature distribution at the powder footprint region of the substrate in which the local temperature of the substrate is in the range 0.5Ts to less than Ts in a volume from the surface of the substrate at least up to a depth of 0.2 mm from the surface of the substrate and not more than 0.Type: ApplicationFiled: October 26, 2012Publication date: October 2, 2014Inventors: Andrew Cockburn, William O'Neill, Martin Sparkes, Rocco Lupoi, Matthew Bray
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Publication number: 20140234551Abstract: A process and apparatus are disclosed for the deposition of a layer of a first material onto a substrate of a second material. Powder particles of the first material are entrained into a carrier gas flow to form a powder beam directed to impinge on the substrate. This defines a powder beam footprint region at the substrate. The powder beam and the substrate are moved relative to each other to move the powder beam footprint relative to the substrate, thereby to deposit the layer of the first material. A laser is operated to cause direct, local heating of at least one of a forward substrate region and a powder beam footprint region. The laser beam direction is defined with reference to a plane coincident with or tangential to a surface of the substrate at the centre of the laser beam footprint in terms of an elevation angle from the plane to the laser beam direction and in terms of an acute azimuthal angle from the movement direction to the laser beam direction.Type: ApplicationFiled: October 26, 2012Publication date: August 21, 2014Inventors: Martin Sparkes, William O'Neill, Andrew Cockburn, Rocco Lupoi, Matthew Bray
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Patent number: 7594048Abstract: Measuring transit time across an asynchronous first-in-first-out (FIFO) memory can include sampling an indication of a value of a read pointer of the FIFO memory at a sampling frequency that exceeds a frequency of a read clock and a write clock of the FIFO memory. An indication of a value of a write pointer of the FIFO memory can be sampled at the sampling frequency. For each sampling period, a measure of occupancy of the FIFO memory can be calculated according to a sampled pair including the indication of the value of the read pointer and the indication of the value of the write pointer. The measure of occupancy can be averaged over a predetermined number of cycles of the sampling frequency. The averaged measure of occupancy can be output as an indication of transit time across the FIFO memory.Type: GrantFiled: August 14, 2007Date of Patent: September 22, 2009Assignee: Xilinx, Inc.Inventors: Gareth David Edwards, David Finlay Taylor, Duncan Andrew Cockburn, Douglas Michael Grant, Stuart Alan Nisbet
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Patent number: 6521454Abstract: Although the present invention has been described with reference to specific details of certain embodiments thereof, it is not intended that such details should be regarded as limitations upon the scope of the invention except as and to the extent that they are included in the accompanying claims.Type: GrantFiled: June 30, 1999Date of Patent: February 18, 2003Assignee: The United States of America, as represented by the Secretary of AgricultureInventors: James J. Becnel, Fukuda Tukuo, Bettina Moser, Andrew Cockburn, Susan E. White, Albert H. Undeen