Abstract: An apparatus is disclosed. The apparatus comprises one or more processors to receive a request to perform a firmware update at a device, prepare a second trusted compute base (TCB) layer for the firmware update, generate a first compound device identifier (CDI) associated with a first TCB layer to be used by the second TCB layer to attest an operational state of the first TCB layer prior to applying the update and generate a second CDI associated with the first TCB layer to be used by the second TCB layer to attest the operational state of the first layer after the update has been applied and perform the firmware update of the second TCB layer.

Abstract: Various examples of device and system implementations and methods for performing end-to-end attestation operations for multi-layer hardware devices are disclosed.

Abstract: A method, system, and computer-readable storage medium that receive a first audio signal generated by a first microphone of a plurality of microphones having a sound inlet, detect an acoustic disturbance in the received first audio signal, the detected acoustic disturbance in the received first audio signal resulting from a tactile interaction proximate the sound inlet of the first microphone, determine whether the detected acoustic disturbance correlates to a pre-defined acoustic signature, and generate, based upon determining that the detected acoustic disturbance correlates to the pre-defined acoustic signature, a control signal corresponding to the pre-defined acoustic signature, the generated control signal controlling one or more of a plurality of speakers of an in-vehicle communication system.

Abstract: A method, system, and computer-readable storage medium that receive a first audio signal generated by a first microphone of a plurality of microphones having a sound inlet, detect an acoustic disturbance in the received first audio signal, the detected acoustic disturbance in the received first audio signal resulting from a tactile interaction proximate the sound inlet of the first microphone, determine whether the detected acoustic disturbance correlates to a pre-defined acoustic signature, and generate, based upon determining that the detected acoustic disturbance correlates to the pre-defined acoustic signature, a control signal corresponding to the pre-defined acoustic signature, the generated control signal controlling one or more of a plurality of speakers of an in-vehicle communication system.

Abstract: Devices and methods for reconfiguring a programmable fabric include identifying resources in a programmable fabric of the programmable device as belonging to a partition. Reconfiguring the programmable fabric also includes creating a mask for the partition that indicates that the identified resources belong to the partition. Reconfiguring the partition also includes reconfiguring resources, via a configuration controller, in programmable fabric associated with the partition using the mask without changing resources associated with other partitions in the programmable fabric.

Abstract: Devices and methods for reconfiguring a programmable fabric include identifying resources in a programmable fabric of the programmable device as belonging to a partition. Reconfiguring the programmable fabric also includes creating a mask for the partition that indicates that the identified resources belong to the partition. Reconfiguring the partition also includes reconfiguring resources, via a configuration controller, in programmable fabric associated with the partition using the mask without changing resources associated with other partitions in the programmable fabric.

Abstract: A method of operating an ad hoc network to protect a passenger-as-a-pedestrian of a stationary vehicle from a vehicle in motion. The network comprises an electronic key for the stationary vehicle carried by the passenger-as-a-pedestrian, an electronic-control-unit with a car-access-system and an on-board-unit with a vehicle-to-vehicle-system as components of a vehicle-network of the stationary vehicle. The car-access-system interfaces the vehicle-to-vehicle-system through the vehicle-network, the one vehicle in motion comprises a vehicle-to-vehicle-system, the on-board-unit of the stationary vehicle receives information from the car-access-system of the electronic-control-unit of the stationary vehicle, and the on-board-unit communicates based on the received information as vehicle-to-driver communication via the vehicle-to-vehicle system of the stationary vehicle with any vehicle in motion.

Abstract: A system for maintaining reconfigurable partitions in an integrated device includes a first buffer having channels that store configuration data and a mask. The system also includes first decompression circuitry having a second buffer coupled to the first buffer that stores the configuration data and second decompression circuitry having a third buffer coupled to the first buffer that stores the mask. The system also includes partition maintenance circuitry that applies the mask to the configuration data after the first decompression circuitry has decompressed the configuration data and the second decompression circuitry has decompressed the mask.

Abstract: A system for maintaining reconfigurable partitions in an integrated device includes a first buffer having channels that store configuration data and a mask. The system also includes first decompression circuitry having a second buffer coupled to the first buffer that stores the configuration data and second decompression circuitry having a third buffer coupled to the first buffer that stores the mask. The system also includes partition maintenance circuitry that applies the mask to the configuration data after the first decompression circuitry has decompressed the configuration data and the second decompression circuitry has decompressed the mask.

Abstract: Devices and methods for reconfiguring a programmable fabric include identifying resources in a programmable fabric of the programmable device as belonging to a partition. Reconfiguring the programmable fabric also includes creating a mask for the partition that indicates that the identified resources belong to the partition. Reconfiguring the partition also includes reconfiguring resources, via a configuration controller, in programmable fabric associated with the partition using the mask without changing resources associated with other partitions in the programmable fabric.

Abstract: Devices and methods for reconfiguring a programmable fabric include identifying resources in a programmable fabric of the programmable device as belonging to a partition. Reconfiguring the programmable fabric also includes creating a mask for the partition that indicates that the identified resources belong to the partition. Reconfiguring the partition also includes reconfiguring resources, via a configuration controller, in programmable fabric associated with the partition using the mask without changing resources associated with other partitions in the programmable fabric.

Abstract: A method of operating an ad hoc network to protect a passenger-as-a-pedestrian of a stationary vehicle from a vehicle in motion wherein the network comprises an electronic key for the stationary vehicle that is carried by the passenger-as-a-pedestrian, an electronic-control-unit with a car-access-system and an on-board-unit with a vehicle-to-vehicle-system as components of a vehicle-network of the stationary vehicle, wherein the car-access-system interfaces to the a vehicle-to-vehicle-system through the vehicle-network, wherein the at least one vehicle in motion comprises a vehicle-to-vehicle-system, wherein the on-board-unit of the stationary vehicle receives at least temporarily information from the car-access-system of the electronic-control-unit of the stationary vehicle and wherein the on-board-unit at least temporarily communicates based on the received information as vehicle-to-driver communication via the vehicle-to-vehicle system of the stationary vehicle with any vehicle in motion.

Abstract: An integrated circuit device such as a programmable integrated circuit may include interface circuits and associated identification circuits. The identification circuits may be coupled to shared mixer circuitry that performs a logic function on mixer input signals received from the identification circuits of that integrated circuit to produce a mixer output signal. Debug computing equipment may be used to test integrated circuits having mixer circuitry. The debug computing equipment may have interfaces that receive connections to interface circuits of the integrated circuits. The debug computing equipment may communicate with the mixer circuitry of the integrated circuits through each of the connected interface circuits to identify groups of interfaces that are connected to different devices. For each device, the debug computing equipment may select an interface from the corresponding group of interfaces and perform test debug operations over the selected interface.

Abstract: According to various embodiments, a programmable device assembly includes an FPGA coupled to a nonvolatile serial configuration memory (e.g., serial flash memory) and a volatile fast bulk memory (e.g., SRAM or SDRAM). The nonvolatile serial configuration memory contains both the FPGA configuration data and CPU instructions. When a predetermined condition occurs, a serial memory access component that is hard coded on the FPGA automatically reads the configuration data from the nonvolatile serial configuration memory. The configuration data is used to configure the FPGA with various components, including a CPU, a boot ROM with code for a boot copier, and a bus structure. When the CPU boots, code for the boot copier is executed so that the CPU instructions are copied from the nonvolatile serial configuration memory to the volatile fast bulk memory. The CPU then executes the CPU instructions stored in the volatile fast bulk memory.

Abstract: Methods and apparatus for programmable logic devices including embedded processors having a dual-port SRAMs. A programmable logic integrated circuit includes a programmable logic portion having a plurality of logic elements, programmably configurable to implement user-defined combinatorial or registered logic functions, and an embedded processor portion coupled to the programmable logic portion. The embedded processor portion includes a processor, and a memory block coupled to the processor. The memory block includes a first plurality of memory cells for storing data, a second plurality of memory cells for storing data, a first port coupled to the first and second pluralities of memory cells, a second port coupled to the first and second pluralities of memory cells, and an arbiter coupled to the first port and the second port.

Abstract: According to various embodiments of the present invention, a programmable device assembly includes an FPGA coupled to a nonvolatile serial configuration memory (e.g., serial flash memory) and a volatile fast bulk memory (e.g., SRAM or SDRAM). The nonvolatile serial configuration memory contains both the FPGA configuration data and CPU instructions. When a predetermined condition occurs, a serial memory access component that is hard coded on the FPGA automatically reads the configuration data from the nonvolatile serial configuration memory. The configuration data is used to configure the FPGA with various components, including a CPU, a boot ROM with code for a boot copier, and a bus structure. When the CPU boots, code for the boot copier is executed so that the CPU instructions are copied from the nonvolatile serial configuration memory to the volatile fast bulk memory. The CPU then executes the CPU instructions stored in the volatile fast bulk memory.

Abstract: Methods and apparatus are provided for handling reset events in a bus bridge. A system on a programmable chip includes master components and slave components supporting various bus protocols. Bus bridges allow components using different bus protocols to interact. Reset of a distinct subset of programmable chip components or the synchronization of reset signals across disparate clock domains is allowed by effectively handling reset related signals at a bus bridge.

Abstract: An operating system for a processor in a hardware device is configured by reading data defining a configuration of the hardware device. Based on the defined configuration of the hardware device, it is determined which operating system configuration options, from a plurality of available operating system configuration options, are valid. Then, only the valid operating system configuration options are presented to a user. The hardware device may be a fixed hardware platform, or may be a configurable hardware device such as an FPGA. The data defining the configuration of the hardware device can be read from a high level design entry tool.

Abstract: Circuitry and methods enable masters without split capability to communicate with split capable slaves in a multilayer system. The output stage associated with each split capable slave, which usually comprises an arbiter, is augmented with a split filter. This split filter designates a channel on behalf of the master without split capability, filters the split and unsplit responses from the slave, and issues a second read request on behalf of the same master. Consequently, both the master without split capability and the split capable slave do not perceive any difference between this transaction and a normal one. The split filter implementation requires, at most, little change to the master and slave devices of the system.

Abstract: Methods and apparatus for programmable logic devices including embedded processors having a dual-port SRAMs. A programmable logic integrated circuit includes a programmable logic portion having a plurality of logic elements, programmably configurable to implement user-defined combinatorial or registered logic functions, and an embedded processor portion coupled to the programmable logic portion. The embedded processor portion includes a processor, and a memory block coupled to the processor. The memory block includes a first plurality of memory cells for storing data, a second plurality of memory cells for storing data, a first port coupled to the first and second pluralities of memory cells, a second port coupled to the first and second pluralities of memory cells, and an arbiter coupled to the first port and the second port.