Abstract: Various systems and methods are provided for Schottky junction solar cells. In one embodiment, a solar cell includes a mesh layer formed on a semiconductor layer and an ionic layer formed on the mesh layer. The ionic layer seeps through the mesh layer and directly contacts the semiconductor layer. In another embodiment, a solar cell includes a first mesh layer formed on a semiconductor layer, a first metallization layer coupled to the first mesh layer, a second high surface area electrically conducting electrode coupled to the first metallization layer by a gate voltage, and an ionic layer in electrical communication with the first mesh layer and the second high surface area electrically conducting electrode. In another embodiment, a solar cell includes a grid layer formed on a semiconductor layer and an ionic layer in electrical communication with the grid layer and the semiconductor layer.

Abstract: Various embodiments are provided for dilute source enabled vertical organic light emitting transistors. In various embodiments, a display panel includes an array of pixels. In one embodiment, among others, at least one pixel includes a switching transistor and a driving transistor coupled to the switching transistor, where the driving transistor is configured to emit light responsive to activation by the switching transistor. The driving transistor may be a dilute source enabled vertical organic light emitting transistor (DS-VOLET). The switching transistor may include a dilute source enabled vertical-field effect transistor (DS-VFET). In another embodiment, a double dilute source enabled vertical-field effect transistor (DS-VFET) includes a first DS-VFET coupled to a second DS-VFET.

Abstract: Various examples are provided for ambipolar vertical field effect transistors (VFETs). In one example, among others, an ambipolar VFET includes a gate layer; a source layer that is electrically percolating and perforated; a dielectric layer; a drain layer; and a semiconducting channel layer. The semiconducting channel layer is in contact with at least a portion of the source layer and at least a portion of the dielectric layer and the source layer and the semiconducting channel layer form a gate voltage tunable charge injection barrier. Another example includes an ambipolar vertical field effect transistor including a dielectric surface treatment layer. The semiconducting channel layer is in contact with at least a portion of the source layer and at least a portion of the dielectric surface treatment layer and where the source layer and the semiconducting channel layer form a gate voltage tunable charge injection barrier.

Abstract: Various examples are provided for brightness compensation in a display. In one example, a method includes identifying an IR voltage drop effect on a pixel supplied by a supply voltage line and generating a brightness signal for the pixel based at least in part on the IR voltage drop effect. In another example, a method includes calculating values of IR voltage drop corresponding to pixels fed by a common supply voltage line and providing a data line signal to each pixel that compensates for the IR voltage drop. In another example, a display device includes a matrix of pixels and a brightness controller configured to determine an IR voltage drop effect on a pixel of the matrix and generate a brightness signal for the pixel based at least in part on the IR voltage drop effect and a temporal average pixel brightness within one refreshing cycle associated with the pixel.

Abstract: Various embodiments are provided for semiconductor devices including an electrically percolating source layer and methods of fabricating the same. In one embodiment, a semiconductor device includes a gate layer, a dielectric layer, a memory layer, a source layer, a semiconducting channel layer, and a drain layer. The source layer is electrically percolating and perforated. The semiconducting channel layer is in contact with the source layer and the memory layer. The source layer and the semiconducting channel layer form a gate voltage tunable charge injection barrier.

Abstract: An electrochromic device (ECD) includes an electrochromic cell and, optionally, one or more additional electrochromic cells where all cells are parallel, and where at least one of the electrodes of one of the cells comprises a single-walled carbon nanotube (SWNT) film The electrochromic cells allow the control of transmittance of two or more different portions of the electro-magnetic spectrum through the ECD. One cell can control the transmittance of visible radiation while the other cell can control the transmittance of IR radiation. The ECD can be employed as a “smart window” to control the heat and light transmission through the window. The ECD can be in the form of a laminate that can be added to an existing window.

Abstract: A degradable polymeric nanotube (NT) dispersant comprises a multiplicity of NT associative groups that are connected to a polymer backbone by a linking group where there are cleavable groups within the polymer backbone and/or the linking groups such that on a directed change of conditions, bond breaking of the cleavable groups results in residues from the degradable polymeric NT dispersant in a manner where the associative groups are uncoupled from other associative groups, rendering the associative groups monomelic in nature. The degradable polymeric nanotube (NT) dispersant can be combined with carbon NTs to form a NT dispersion that can be deposited to form a NT film, or other structure, by air brushing, electrostatic spraying, ultrasonic spraying, ink-jet printing, roll-to-roll coating, or dip coating. The deposition can render a NT film that is of a uniform thickness or is patterned with various thicknesses.

Abstract: Embodiments of the invention relate to field effect transistors. The field effect transistor includes a gate electrode for providing a gate field, a first electrode including a conductive material having a low carrier density and a low density of electronic states, a second electrode, and a semiconductor. Contact barrier modulation includes barrier height lowering of a Schottky contact between the first electrode and the semiconductor. In some embodiments of the invention, a vertical field effect transistor employs an electrode comprising a conductive material with a low density of states such that the transistors contact barrier modulation comprises barrier height lowering of the Schottky contact between the electrode with a low density of states and the adjacent semiconductor by a Fermi level shift.

Abstract: An electrode comprises an acid treated, cathodically cycled carbon-comprising film or body. The carbon consists of single walled nanotubes (SWNTs), pyrolytic graphite, microcrystalline graphitic, any carbon that consists of more than 99% sp2 hybridized carbons, or any combination thereof. The electrode can be used in an electrochemical device functioning as an electrolyser for evolution of hydrogen or as a fuel cell for oxidation of hydrogen. The electrochemical device can be coupled as a secondary energy generator into a system with a primary energy generator that naturally undergoes generation fluctuations. During periods of high energy output, the primary source can power the electrochemical device to store energy as hydrogen, which can be consumed to generate electricity as the secondary source during low energy output by the primary source. Solar cells, wind turbines and water turbines can act as the primary energy source.

Abstract: Various embodiments are provided for dilute source enabled vertical organic light emitting transistors. In various embodiments, a display panel includes an array of pixels. In one embodiment, among others, at least one pixel includes a switching transistor and a driving transistor coupled to the switching transistor, where the driving transistor is configured to emit light responsive to activation by the switching transistor. The driving transistor may be a dilute source enabled vertical organic light emitting transistor (DS-VOLET). The switching transistor may include a dilute source enabled vertical-field effect transistor (DS-VFET). In another embodiment, a double dilute source enabled vertical-field effect transistor (DS-VFET) includes a first DS-VFET coupled to a second DS-VFET.

Abstract: Various embodiments are provided for semiconductor devices including an electrically percolating source layer and methods of fabricating the same. In one embodiment, a semiconductor device includes a gate layer, a dielectric layer, a memory layer, a source layer, a semiconducting channel layer, and a drain layer. The source layer is electrically percolating and perforated. The semiconducting channel layer is in contact with the source layer and the memory layer. The source layer and the semiconducting channel layer form a gate voltage tunable charge injection barrier.

Abstract: Various systems and methods are provided for Schottky junction solar cells. In one embodiment, a solar cell includes a mesh layer formed on a semiconductor layer and an ionic layer formed on the mesh layer. The ionic layer seeps through the mesh layer and directly contacts the semiconductor layer. In another embodiment, a solar cell includes a first mesh layer formed on a semiconductor layer, a first metallization layer coupled to the first mesh layer, a second high surface area electrically conducting electrode coupled to the first metallization layer by a gate voltage, and an ionic layer in electrical communication with the first mesh layer and the second high surface area electrically conducting electrode. In another embodiment, a solar cell includes a grid layer formed on a semiconductor layer and an ionic layer in electrical communication with the grid layer and the semiconductor layer.

Abstract: Embodiments of the invention relate to vertical field effect transistor that is a light emitting transistor. The light emitting transistor incorporates a gate electrode for providing a gate field, a first electrode comprising a dilute nanotube network for injecting a charge, a second electrode for injecting a complementary charge, and an electroluminescent semiconductor layer disposed intermediate the nanotube network and the electron injecting layer. The charge injection is modulated by the gate field. The holes and electrons, combine to form photons, thereby causing the electroluminescent semiconductor layer to emit visible light. In other embodiments of the invention a vertical field effect transistor that employs an electrode comprising a conductive material with a low density of states such that the transistors contact barrier modulation comprises barrier height lowering of the Schottky contact between the electrode with a low density of states and the adjacent semiconductor by a Fermi level shift.

Abstract: Embodiments of the invention relate to vertical field effect transistor that is a light emitting transistor. The light emitting transistor incorporates a gate electrode for providing a gate field, a first electrode comprising a dilute nanotube network for injecting a charge, a second electrode for injecting a complementary charge, and an electroluminescent semiconductor layer disposed intermediate the nanotube network and the electron injecting layer. The charge injection is modulated by the gate field. The holes and electrons, combine to form photons, thereby causing the electroluminescent semiconductor layer to emit visible light. In other embodiments of the invention a vertical field effect transistor that employs an electrode comprising a conductive material with a low density of states such that the transistors contact barrier modulation comprises barrier height lowering of the Schottky contact between the electrode with a low density of states and the adjacent semiconductor by a Fermi level shift.

Abstract: A vertical field effect transistor (FET) comprises a gate electrode and a first electrode layer having a dielectric layer interposed between these electrodes and a semiconducting active layer electrically coupled to the first electrode. The active layer and the dielectric layer sandwich at least a portion of the first electrode where at least one portion of the active layer is unshielded by the first electrode such that the unshielded portion is in direct physical contact with the dielectric layer. A second electrode layer is electrically coupled to the active layer where the second electrode is disposed on at least a portion of the unshielded portion of the active layer such that the second electrode can form electrostatic fields with the gate electrode upon biasing in unscreened regions near the first electrode.

Abstract: An embodiment of the invention is an air cathode having a porous membrane with at least one hydrophobic surface that contacts a conductive catalytic film that comprises single walled carbon nanotubes (SWNTs) where the nanotubes are in intimate electrical contact. The conductive film can include fullerenes, metals, metal alloys, metal oxides, or electroactive polymers in addition to the SWNTs. In other embodiments of the invention the air cathode is a component of a metal-air battery or a fuel cell.

Abstract: A semiconductor device includes at least one semiconductor layer, a metal layer in electrical contact with the semiconductor layer, and a carbon nanotube contact layer interposed between the metal layer and the semiconductor layer. The contact layer electrically couples the metal layer to the semiconductor layer and provides a semiconductor contact having low specific contact resistance. The contact layer can be substantially optically transparent layer in at least a portion of the visible light range.

Abstract: An electrical or electro-optical device (100) includes a first layer (110) having a first composition. The first composition includes a plurality of electrically connected particles. A second layer (130) has a second composition, the second composition including a plurality of electrically connected particles. A composite layer (120) is disposed between the first and second layer. The composite layer is an interpenetrated network of a third and a fourth composition, wherein the third composition is different from the fourth composition. A first electrically interconnected network extends from the first composition in the first layer (110) to the third composition throughout a thickness of the composite layer (120), and a second electrically interconnected network extends from the second composition in the second layer (130) to the fourth composition throughout the thickness of the composite layer.

Abstract: Embodiments of the invention relate to vertical field effect transistor that is a light emitting transistor. The light emitting transistor incorporates a gate electrode for providing a gate field, a first electrode comprising a dilute nanotube network for injecting a charge, a second electrode for injecting a complementary charge, and an electroluminescent semiconductor layer disposed intermediate the nanotube network and the electron injecting layer. The charge injection is modulated by the gate field. The holes and electrons, combine to form photons, thereby causing the electroluminescent semiconductor layer to emit visible light. In other embodiments of the invention a vertical field effect transistor that employs an electrode comprising a conductive material with a low density of states such that the transistors contact barrier modulation comprises barrier height lowering of the Schottky contact between the electrode with a low density of states and the adjacent semiconductor by a Fermi level shift.

Abstract: An highly porous electrically conducting film that includes a plurality of carbon nanotubes, nanowires or a combination of both. The highly porous electrically conducting film exhibits an electrical resistivity of less than 0.1 ?·cm at 25 C and a density of between 0.05 and 0.70 g/cm3. The film can exhibit a density between 0.50 and 0.85 g/cm3 and an electrical resistivity of less than 6×10?3 ?·cm at 25 C. Also included is a method of forming these highly porous electrically conducting films by forming a composite film using carbon nanotubes or nanowires and sacrificial nanoparticles or microparticles. At least a portion of the nanoparticles or microparticles are then removed from the composite film to form the highly porous electrically conducting film.