Patents by Inventor Andrew J. Pagones

Andrew J. Pagones has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method and system for operating a comparator
    Patent number: 7570190
    Abstract: A method and system for operating a comparator (602) is provided. The method includes analyzing an output (612) of the comparator (602) based on one or more of a transition of the output, present operational state of the comparator, and at least one time instant corresponding to the output. The method further includes controlling an operational state of the comparator (602) based on the analysis of the output (612).
    Type: Grant
    Filed: March 28, 2008
    Date of Patent: August 4, 2009
    Assignee: Motorola, Inc.
    Inventors: Andrew J. Pagones, Poojan A. Wagh
  • Method and apparatus for driving a capacitive display device
    Patent number: 5929656
    Abstract: An apparatus (110) for driving a capacitive display device (120) includes a pull-up transistor (180) having a source connected to a high voltage input node (184), a push-down transistor (182) having a source connected to a low voltage input node (186) and a drain connected to the drain of the pull-up transistor (180), a pull-up voltage level shifter (132) connected to the gate of the pull-up transistor (180), and a push-down voltage level shifter (134) connected to the gate of the push-down transistor (182), the drain of the pull-up transistor (180) connected to the drain of the push-down transistor (182) at a driver output node (170). A method for driving a capacitive display device (120) includes driving the capacitive display device (120) with a drive voltage signal (172) having a bandwidth substantially within the bandwidth of the capacitive display device (120).
    Type: Grant
    Filed: May 16, 1997
    Date of Patent: July 27, 1999
    Assignee: Motorola, Inc.
    Inventor: Andrew J. Pagones
  • High bandwidth fast settling time operational amplifier and method therefor
    Patent number: 5760647
    Abstract: A wide bandwidth fast settling operational amplifier (71) comprises a first stage (72) and a second stage (73). The first stage attenuates a differential input signal applied to the operational amplifier (71). The second stage (73) provides all the gain of the operational amplifier (71). The first stage is a wide bandwidth stage having a differential input transistor pair (74,75) coupled in a voltage follower configuration. The differential input transistor pair (74,75) are degenerated by resistors (76,77) to reduce voltage gain and to lower an impedance coupled to the second stage (73). The first stage (72) is biased via a current source. The first stage (72) provides a reference voltage to the second stage that corresponds to and varies with an input common mode voltage. The reference voltage is used to bias a cascode stage in the second stage (73) to increase common mode range.
    Type: Grant
    Filed: June 4, 1996
    Date of Patent: June 2, 1998
    Assignee: Motorola, Inc.
    Inventors: Matthew R. Miller, Andrew J. Pagones