Patents by Inventor Andrew M. Gabor

Andrew M. Gabor has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200244212
    Abstract: Apparatus and methods to mount solar panels in a way that the panels are supported from the rear side by spacer elements termed RailPads and RoofPads are provided. These spacer elements press upon the rear side of the panel to displace regions of the panel away from the mounting structure. The support provided by the spacer elements reduces downward panel deflection from wind, snow, and other loads, thus minimizing tensile stress in the cells and thus minimizing solar cell crack formation and propagation. The upward bow in the panel places cells in a state of protective compressive stress.
    Type: Application
    Filed: January 29, 2020
    Publication date: July 30, 2020
    Inventors: Andrew M. GABOR, Andrew P. ANSELMO, Robert E. JANOCH, JR.
  • Patent number: 8669187
    Abstract: A porous lift off layer facilitates removal of films from surfaces, such as semiconductors. A layer, with porosities typically larger than the film thickness is provided where no film is desired. The film is applied over the porous layer and also where it is desired. The porous material and the film are then removed from areas where film is not intended. The porous layer can be provided as a slurry, dried to open porosities, or fugitive particles within a field, which disassociate upon the application of heat or solvent. The film can be removed by etchant that enters through porosities that have arisen due to the film not bridging the spaces between solid portions. Etchant attacks both film surfaces. Particles may have diameters of four to ten times the film thickness. Particles may be silica, alumina and ceramics. Porous layers can be used in depressions or on flat surfaces.
    Type: Grant
    Filed: May 7, 2010
    Date of Patent: March 11, 2014
    Assignee: 1366 Technologies, Inc.
    Inventors: Emanuel M. Sachs, Andrew M. Gabor
  • Patent number: 8628992
    Abstract: Methods exploiting a Self Aligned Cell (SAC) architecture for doping purposes, use the architecture to direct the deposition and application of either a dopant or a diffusion retarder. Doping is provided in regions that will become metallization for conducting fingers. Dopant may be treated directly into metallization grooves. Or, diffusion retarder may be provided in non-groove locations, and dopant may be provided over some or all of the entire wafer surface. Dopant and metal automatically go where desired, and in register with each other. The SAC architecture also includes concave surfaces for light absorbing regions of a cell, to reduce reflection of light energy, which regions may also be treated with dopant in the concavities, to result in semi-conductor emitter lines. Alternatively, diffusion retarder may be treated into the concavities, leaving upper tips of ridges between the concavities exposed, thereby subject to deeper doping.
    Type: Grant
    Filed: April 17, 2009
    Date of Patent: January 14, 2014
    Assignee: 1366 Technologies, Inc.
    Inventors: Andrew M. Gabor, Richard L. Wallace
  • Publication number: 20120122266
    Abstract: A porous lift off layer facilitates removal of films from surfaces, such as semiconductors. A film is applied over a patterned porous layer, the layer comprising openings typically larger than the film thickness. The porous material and the film are then removed from areas where film is not intended. The porous layer can be provided as a slurry, dried to open porosities, or fugitive particles within a field, which disassociate upon the application of heat or solvent.
    Type: Application
    Filed: May 7, 2010
    Publication date: May 17, 2012
    Applicant: 1366 TECHNOLOGIES INC.
    Inventors: Emanuel M. Sachs, Andrew M. Gabor
  • Publication number: 20110146782
    Abstract: Methods exploiting a Self Aligned Cell (SAC) architecture for doping purposes, use the architecture to direct the deposition and application of either a dopant or a diffusion retarder. Doping is provided in regions that will become metallization for conducting fingers. Dopant may be treated directly into metallization grooves. Or, diffusion retarder may be provided in non-groove locations, and dopant may be provided over some or all of the entire wafer surface. Dopant and metal automatically go where desired, and in register with each other. The SAC architecture also includes concave surfaces for light absorbing regions of a cell, to reduce reflection of light energy, which regions may also be treated with dopant in the concavities, to result in semiconductor emitter lines. Alternatively, diffusion retarder may be treated into the concavities, leaving upper tips of ridges between the concavities exposed, thereby subject to deeper doping.
    Type: Application
    Filed: April 17, 2009
    Publication date: June 23, 2011
    Applicant: 1366 TECHNOLOGIES INC.
    Inventors: Andrew M. Gabor, Richard L. Wallace
  • Patent number: 5441897
    Abstract: A process for producing a slightly Cu-poor thin film of Cu(In,Ga)(Se,S).sub.2 comprises depositing a first layer of (In,Ga).sub.x (Se,S).sub.y followed by depositing just enough Cu+(Se,S) or Cu.sub.x (Se,S) to produce the desired slightly Cu-poor material. In a variation, most, but not all, (about 90 to 99%) of the (In,Ga).sub.x (Se,S).sub.y is deposited first, followed by deposition of all the Cu+(Se,S) or Cu.sub.x (Se,S) to go near stoichiometric, possibly or even preferably slightly Cu-rich, and then in turn followed by deposition of the remainder (about 1 to 10%) of the (In,Ga).sub.x (Se,S).sub.y to end with a slightly Cu-poor composition. In yet another variation, a small portion (about 1 to 10%) of the (In,Ga).sub.x (Se,S).sub.y is first deposited as a seed layer, followed by deposition of all of the Cu+(Se,S) or Cu.sub.x (Se,S) to make a very Cu-rich mixture, and then followed deposition of the remainder of the (In,Ga).sub.x (Se,S).sub.y to go slightly Cu-poor in the final Cu(In,Ga)(Se,S).sub.
    Type: Grant
    Filed: February 16, 1994
    Date of Patent: August 15, 1995
    Assignee: Midwest Research Institute
    Inventors: Rommel Noufi, Andrew M. Gabor, John R. Tuttle, Andrew L. Tennant, Miguel A. Contreras, David S. Albin, Jeffrey J. Carapella
  • Patent number: 5436204
    Abstract: A process for fabricating slightly Cu-poor thin-films of Cu(In,Ga)Se.sub.2 on a substrate for semiconductor device applications includes the steps of forming initially a slightly Cu-rich, phase separated, mixture of Cu(In,Ga)Se.sub.2 :Cu.sub.x Se on the substrate in solid form followed by exposure of the Cu(In,Ga)Se.sub.2 :Cu.sub.x Se solid mixture to an overpressure of Se vapor and (In,Ga) vapor for deposition on the Cu(In,Ga)Se.sub.2 :Cu.sub.x Se solid mixture while simultaneously increasing the temperature of the solid mixture toward a recrystallization temperature (about 550.degree. C.) at which Cu(In,Ga)Se.sub.2 is solid and Cu.sub.x Se is liquid. The (In,Ga) flux is terminated while the Se overpressure flux and the recrystallization temperature are maintained to recrystallize the Cu.sub.x Se with the (In, Ga) that was deposited during the temperature transition and with the Se vapor to form the thin-film of slightly Cu-poor Cu.sub.x (In,Ga).sub.y Se.sub.z.
    Type: Grant
    Filed: August 22, 1994
    Date of Patent: July 25, 1995
    Assignee: Midwest Research Institute
    Inventors: David S. Albin, Jeffrey J. Carapella, John R. Tuttle, Miguel A. Contreras, Andrew M. Gabor, Rommel Noufi, Andrew L. Tennant