Patents by Inventor Andrew Martwick
Andrew Martwick has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230402990Abstract: Clock distribution in an integrated circuit component can comprise the generation of bulk acoustic waves by acoustic transmitters and propagation of the bulk acoustic waves across the substrate where they are received by piezoelectric elements acting as acoustic receivers. Clock distribution can also comprise the generation of surface acoustic waves by acoustic transmitters located on the same substrate surface as the piezoelectric elements. An acoustic transmitter comprises a layer of piezoelectric material that generates an acoustic wave in response to the piezoelectric layer being activated by a clock source signal applied to the acoustic transmitter. The piezoelectric elements convert the acoustic waves into an electrical signal which can be used as a local clock signal for devices and components in the vicinity of the piezoelectric elements or from which such a local clock signal can be derived.Type: ApplicationFiled: April 14, 2023Publication date: December 14, 2023Applicant: Intel CorporationInventors: Jason A. Mix, Liwei Zhao, Alexander T. Hoang, Sarah Shahraini, Ruth Y. Vidana Morales, Andrew Martwick, Andrea S. Muljono
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Patent number: 11614468Abstract: A scheme for noise floor de-embedding by identifying a link or relationship between noise floor from an oscilloscope and phase jitter impact on a toggling signal. The scheme uses phase or electrical spectrum and phase detection for noise floor recognition. The scheme de-embeds the impact from random noise and also removes deterministic noise or jitter from the oscilloscope. The scheme provides accurate jitter analysis for a circuit (e.g., clock data recovery circuit) after de-embedding noise floor for the oscilloscope.Type: GrantFiled: June 25, 2020Date of Patent: March 28, 2023Assignee: Intel CorporationInventors: Liwei Zhao, Andrew Martwick, Michael W. Altmann, Michael Mirmak, Kamel Ahmad, Andrew Holland
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Patent number: 11347580Abstract: Techniques for encoding data are described herein. The method includes receiving a block payload at a physical layer to be transmitted via a data bus. The method includes establishing a block header comprising an arrangement of bits, the block header defining two block header types, wherein a hamming distance between block header types is at least four.Type: GrantFiled: April 13, 2021Date of Patent: May 31, 2022Assignee: Intel CorporationInventors: Huimin Chen, Andrew Martwick, Howard Heck, Robert Dunstan, Dennis Bell, Abdul Ismail
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Publication number: 20210405090Abstract: A scheme for noise floor de-embedding by identifying a link or relationship between noise floor from an oscilloscope and phase jitter impact on a toggling signal. The scheme uses phase or electrical spectrum and phase detection for noise floor recognition. The scheme de-embeds the impact from random noise and also removes deterministic noise or jitter from the oscilloscope. The scheme provides accurate jitter analysis for a circuit (e.g.Type: ApplicationFiled: June 25, 2020Publication date: December 30, 2021Applicant: Intel CorporationInventors: Liwei Zhao, Andrew Martwick, Michael W. Altmann, Michael Mirmak, Kamel Ahmad, Andrew Holland
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Publication number: 20210232454Abstract: Techniques for encoding data are described herein. The method includes receiving a block payload at a physical layer to be transmitted via a data bus. The method includes establishing a block header comprising an arrangement of bits, the block header defining two block header types, wherein a hamming distance between block header types is at least four.Type: ApplicationFiled: April 13, 2021Publication date: July 29, 2021Inventors: Huimin Chen, Andrew Martwick, Howard Heck, Robert Dunstan, Dennis Bell, Abdul Ismail
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Patent number: 10997016Abstract: Techniques for encoding data are described herein. The method includes receiving a block payload at a physical layer to be transmitted via a data bus. The method includes establishing a block header comprising an arrangement of bits, the block header defining two block header types, wherein a hamming distance between block header types is at least four.Type: GrantFiled: July 9, 2019Date of Patent: May 4, 2021Assignee: INTEL CORPORATIONInventors: Huimin Chen, Andrew Martwick, Howard Heck, Robert Dunstan, Dennis Bell, Abdul Ismail
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Publication number: 20200026599Abstract: Techniques for encoding data are described herein. The method includes receiving a block payload at a physical layer to be transmitted via a data bus. The method includes establishing a block header comprising an arrangement of bits, the block header defining two block header types, wherein a hamming distance between block header types is at least four.Type: ApplicationFiled: July 9, 2019Publication date: January 23, 2020Applicant: INTEL CORPORATIONInventors: Huimin Chen, Andrew Martwick, Howard Heck, Robert Dunstan, Dennis Bell, Abdul Ismail
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Patent number: 10372527Abstract: Techniques for encoding data are described herein. The method includes receiving a block payload at a physical layer to be transmitted via a data bus. The method includes establishing a block header comprising an arrangement of bits, the block header defining two block header types, wherein a hamming distance between block header types is at least four.Type: GrantFiled: July 15, 2013Date of Patent: August 6, 2019Assignee: Intel CorporationInventors: Huimin Chen, Andrew Martwick, Howard Heck, Robert Dunstan, Dennis Bell, Abdul Hawk Ismail
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Patent number: 9106373Abstract: A method and apparatus for dynamically adjusting power of a transmitter is herein described. A transmitter transmits a pattern to a receiver at a differential voltage. The length of the pattern, in one embodiment, is selected to be a reasonable length training pattern, as not to incur an extremely long training phase. If errors are detected at the receiver in the pattern, the transmitter steps the differential voltage until errors are not detected in the pattern at the receiver. The differential voltage, where no errors are detected, is scaled by a proportion of a target confidence level to a measured confidence level associated with the reasonable length training pattern. As a result, a training phase is potentially reduced and power is saved while not sacrificing confidence levels in error rates in the data exchange between the transmitter and receiver.Type: GrantFiled: January 28, 2014Date of Patent: August 11, 2015Assignee: Intel CorporationInventor: Andrew Martwick
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Publication number: 20150019921Abstract: Techniques for encoding data are described herein. The method includes receiving a block payload at a physical layer to be transmitted via a data bus. The method includes establishing a block header comprising an arrangement of bits, the block header defining two block header types, wherein a hamming distance between block header types is at least four.Type: ApplicationFiled: July 15, 2013Publication date: January 15, 2015Inventors: Huimin Chen, Andrew Martwick, Howard Heck, Robert Dunstan, Dennis Bell, Abdul Hawk Ismail
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Publication number: 20140233622Abstract: A method and apparatus for dynamically adjusting power of a transmitter is herein described. A transmitter transmits a pattern to a receiver at a differential voltage. The length of the pattern, in one embodiment, is selected to be a reasonable length training pattern, as not to incur an extremely long training phase. If errors are detected at the receiver in the pattern, the transmitter steps the differential voltage until errors are not detected in the pattern at the receiver. The differential voltage, where no errors are detected, is scaled by a proportion of a target confidence level to a measured confidence level associated with the reasonable length training pattern. As a result, a training phase is potentially reduced and power is saved while not sacrificing confidence levels in error rates in the data exchange between the transmitter and receiver.Type: ApplicationFiled: January 28, 2014Publication date: August 21, 2014Inventor: Andrew Martwick
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Patent number: 8750138Abstract: In some embodiments, a chip comprises control circuitry to provide inband signals, inband output ports, and transmitters to transmit the inband signals to the inband output ports. The control circuitry selectively includes loopback initiating commands in the inband signals. Other embodiments are described and claimed.Type: GrantFiled: December 20, 2012Date of Patent: June 10, 2014Assignee: Intel CorporationInventors: Theodore Zale Schoenborn, Andrew Martwick, David Dunning
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Patent number: 8638866Abstract: A method and apparatus for dynamically adjusting power of a transmitter is herein described. A transmitter transmits a pattern to a receiver at a differential voltage. The length of the pattern, in one embodiment, is selected to be a reasonable length training pattern, as not to incur an extremely long training phase. If errors are detected at the receiver in the pattern, the transmitter steps the differential voltage until errors are not detected in the pattern at the receiver. The differential voltage, where no errors are detected, is scaled by a proportion of a target confidence level to a measured confidence level associated with the reasonable length training pattern. As a result, a training phase is potentially reduced and power is saved while not sacrificing confidence levels in error rates in the data exchange between the transmitter and receiver.Type: GrantFiled: July 31, 2012Date of Patent: January 28, 2014Assignee: Intel CorporationInventor: Andrew Martwick
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Patent number: 7415032Abstract: A first device and a second device, each coupled to one or more signal paths, attempting to transmit symbols over one or more of the signal paths, identifying one or more signal paths over each of which each device is able to transmit a symbol to the other device and over which each device is able to receive a symbol from the other device, and enrolling the identified signal paths into an aggregation of signal paths operable to provide for communication between the devices.Type: GrantFiled: November 13, 2002Date of Patent: August 19, 2008Assignee: Intel CorporationInventors: Ken Drottar, David S. Dunning, Andrew Martwick, Zale Schoenborn, Scott T. Gardiner
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Patent number: 7350087Abstract: Briefly, system and method for message-based power management which may be used, for example, in computer systems and communications networks. Embodiments of the present invention may include, for example, a device connected to a power management controller (PMC); the device and/or the PMC may send, receive, and/or process power management event (PME) messages. Embodiments of the present invention may operate using links in communicative and/or non-communicative modes. Embodiments of the present invention may include a switch, to send/receive, process, create, re-format and/or route one or more PME message on behalf of various devices, for example, a Peripheral Component Interconnect (PCI) device.Type: GrantFiled: March 31, 2003Date of Patent: March 25, 2008Assignee: Intel CorporationInventors: Alon Naveh, Mohan Kumar, Michael Gutman, Andrew Martwick, Gary Solomon
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Publication number: 20070280121Abstract: In some embodiments, a chip comprises control circuitry to provide inband signals, inband output ports, and transmitters to transmit the inband signals to the inband output ports. The control circuitry selectively includes loopback initiating commands in the inband signals. Other embodiments are described and claimed.Type: ApplicationFiled: August 21, 2007Publication date: December 6, 2007Inventors: Theodore Schoenborn, Andrew Martwick, David Dunning
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Publication number: 20070141992Abstract: Interference within a wireless apparatus is mitigated by adjusting one or more transmission characteristics associated with an interconnect of the apparatus. In at least one embodiment, the interconnect is a PCI Express interconnect.Type: ApplicationFiled: February 13, 2007Publication date: June 21, 2007Inventors: Seh Kwa, David Xu, Alan Waltho, Andrew Martwick, Ravid Shmuel
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Publication number: 20060248364Abstract: A distributed power management system for a bus architecture or similar communications network. The system supports multiple low power states and defines entry and exit procedures for maximizing energy savings and communication speed.Type: ApplicationFiled: May 26, 2006Publication date: November 2, 2006Inventors: Michael Gutman, Alon Naveh, Andrew Martwick, Gary Solomon
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Publication number: 20060218426Abstract: A distributed power management system for a bus architecture or similar communications network. The system supports multiple low power states and defines entry and exit procedures for maximizing energy savings and communication speed.Type: ApplicationFiled: May 26, 2006Publication date: September 28, 2006Inventors: Michael Gutman, Alon Naveh, Andrew Martwick, Gary Solomon
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Patent number: 7109755Abstract: An integrated circuit is disclosed. The integrated circuit includes a power delivery network (PDN), a first voltage rail coupled to the PDN, an input/output (I/O) buffer coupled to the first voltage rail and a driver coupled to the I/O buffer. The driver transmits a current waveform to the I/O buffer whenever a switching event occurs at the I/O buffer.Type: GrantFiled: October 27, 2004Date of Patent: September 19, 2006Assignee: Intel CorporationInventors: Dmitriy S. Garmatyuk, Christopher D. Loental, Andrew Martwick