Patents by Inventor Andrew Robert Wilmot

Andrew Robert Wilmot has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11928045
    Abstract: The present disclosure relates to a method for use with an electronic design. Embodiments may include simulating a processor model and a hardware model, each executed with a corresponding simulator thread on a simulation platform. Embodiments may also include simulating embedded software using the processor model. The simulating may include updating a given register of the processor model that stores a value that changes in response to switching between processes within the embedded software. Embodiments may further include setting a simulator breakpoint and a software breakpoint and enabling debugging of both non-virtual and virtual addresses at the software breakpoint without leaving the software breakpoint.
    Type: Grant
    Filed: April 21, 2021
    Date of Patent: March 12, 2024
    Assignee: Cadence Design Systems, Inc.
    Inventors: Bishnupriya Bhattacharya, Andrew Robert Wilmot, Zhiting Duan, Neeti Khullar Bhatnagar
  • Patent number: 10650174
    Abstract: The present disclosure relates to a system and method for use in an electronic design environment. Embodiments may include receiving, using at least one processor, an electronic design and generating a unique name for each hardware state element associated with the electronic design. Embodiments may further include generating a unique name for each software state element associated with the electronic design. Embodiments may also include combining a plurality of unique names into an arbitrary expression, wherein the plurality of unique names includes at least one software state unique name and at least one hardware state unique name. Embodiments may further include evaluating the arbitrary expression at one or more discrete time points. Embodiments may also include recording an evaluated expression in an electronic design database.
    Type: Grant
    Filed: May 24, 2017
    Date of Patent: May 12, 2020
    Assignee: Cadence Design Systems, Inc.
    Inventors: Andrew Robert Wilmot, Rohan Kangralkar, George Franklin Frazier, Neeti Khullar Bhatnagar
  • Patent number: 10176078
    Abstract: The present disclosure relates to a system and method for capturing log messages in a post-processing debugging environment. Embodiments may include receiving a processor model associated with an electronic design and generating, using one or more processors and the processor model, a complete view of the state of the memory. Embodiments may further include writing, using one or more processors and the processor model, a log message whenever a designated message logging function is reached within the complete view of the state of the memory.
    Type: Grant
    Filed: August 28, 2015
    Date of Patent: January 8, 2019
    Assignee: Cadence Design Systems, Inc.
    Inventors: Vincent Motel, Andrew Robert Wilmot, Tal Tabakman, Yonatan Ashkenazi
  • Patent number: 7720665
    Abstract: A system for controlling reset in discrete event simulation is disclosed. The system includes a simulator configured to effect the discrete event simulation, the simulator having a plurality of shared executable files, a memory configured to store the simulator for execution, an operating system having a loading/unloading facility, and a control program configured to effect a reset operation by directing the operating system to unload the simulator from the memory and then reload the simulator into the memory using the loading/unloading facility.
    Type: Grant
    Filed: May 4, 2006
    Date of Patent: May 18, 2010
    Assignee: Cadence Design Systems, Inc.
    Inventors: George Franklin Frazier, Qizhang Chao, Tuay-Ling Kathy Lang, Neeti Khullar Bhatnagar, Andrew Robert Wilmot