Patents by Inventor Andrew Tomlin
Andrew Tomlin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20090172386Abstract: The present invention presents a non-volatile memory system that adapts its performance to one or more system related situation. If a situation occurs where the memory will require more than the allotted time for completing an operation, the memory can switch from its normal operating mode to a high performance mode in order to complete the operation quickly enough. Conversely, if a situation arises where reliability could be an issue (such as partial page programming), the controller could switch to a high reliability mode. In either case, once the trigging system situation has returned to normal, the memory reverts to the normal operation. The detection of such situations can be used both for programming and data relocation operations. An exemplary embodiment is based on firmware programmable performance.Type: ApplicationFiled: February 2, 2009Publication date: July 2, 2009Inventors: Andrew Tomlin, Carlos Gonzalez
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Patent number: 7502921Abstract: The present invention presents a non-volatile memory system that adapts its performance to one or more system related situation. If a situation occurs where the memory will require more than the allotted time for completing an operation, the memory can switch from its normal operating mode to a high performance mode in order to complete the operation quickly enough. Conversely, if a situation arises where reliability could be an issue (such as partial page programming), the controller could switch to a high reliability mode. In either case, once the trigging system situation has returned to normal, the memory reverts to the normal operation. The detection of such situations can be used both for programming and data relocation operations. An exemplary embodiment is based on firmware programmable performance.Type: GrantFiled: August 2, 2005Date of Patent: March 10, 2009Assignee: SanDisk CorporationInventors: Andrew Tomlin, Carlos Gonzalez
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Publication number: 20080320245Abstract: A method for writing data to a memory device is disclosed. In one embodiment, data of an atomic transaction is written to a first memory in a memory device. A determination is made regarding whether all of the data of the atomic transaction was written to the first memory. The data of the atomic transaction is read from the first memory and written to a second memory in the memory device only if it is determined that all of the data of the atomic transaction was written to the first memory.Type: ApplicationFiled: June 19, 2007Publication date: December 25, 2008Inventors: Andrew Tomlin, Sergey A. Gorobets, Reuven Elhamias, Shai Traister, Alan D. Bennett
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Publication number: 20080320253Abstract: A memory device with circuitry for writing data of an atomic transaction is disclosed. In one embodiment, data of an atomic transaction is written to a first memory in a memory device. A determination is made regarding whether all of the data of the atomic transaction was written to the first memory. The data of the atomic transaction is read from the first memory and written to a second memory in the memory device only if it is determined that all of the data of the atomic transaction was written to the first memory.Type: ApplicationFiled: June 19, 2007Publication date: December 25, 2008Inventors: Andrew Tomlin, Sergey A. Gorobets, Reuven Elhamias, Shai Traister, Alan D. Bennett
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Publication number: 20080270639Abstract: A memory card that adapts its operation according to the application to which it applied or the conditions under which it is operated. This allows the card to dynamical self optimize. In a first set of embodiments, the card uses host profiling where it will learn about the host during host-card interactions and the card's controller will optimize its algorithms accordingly. In another set of embodiments, the host and card will report to one another their capabilities for a quality of service negotiation. A further set of embodiments allows the storage device to memorize access sequences issued by the host under various predefined conditions, such as host reset or a power on boot sequence. The storage device can use this information to optimize operation for the expected commands. On deviation from an expected sequence, the device would memorize the new command sequence and save it, thus operating in a self-adaptive manner.Type: ApplicationFiled: July 2, 2008Publication date: October 30, 2008Inventors: Reuven Elhamias, Andrew Tomlin, Wesley G. Brewer, Yosi Pinto, Micky Holtzman
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Patent number: 7427027Abstract: A memory card that adapts its operation according to the application to which it applied or the conditions under which it is operated. This allows the card to dynamical self optimize. In a first set of embodiments, the card uses host profiling where it will learn about the host during host-card interactions and the card's controller will optimize its algorithms accordingly. In another set of embodiments, the host and card will report to one another their capabilities for a quality of service negotiation. A further set of embodiments allows the storage device to memorize access sequences issued by the host under various predefined conditions, such as host reset or a power on boot sequence. The storage device can use this information to optimize operation for the expected commands. On deviation from an expected sequence, the device would memorize the new command sequence and save it, thus operating in a self-adaptive manner.Type: GrantFiled: July 28, 2004Date of Patent: September 23, 2008Assignee: SanDisk CorporationInventors: Reuven Elhamias, Andrew Tomlin, Wesley G. Brewer, Yosi Pinto, Micky Holtzman
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Publication number: 20080162612Abstract: In accordance with various embodiments of the present invention, block relinking during garbage collection is described. Block relinking may include writing a memory write to update a block of a first metablock to a block of a second metablock, copying valid portions of the block of the first metablock to the block of the second metablock, and linking the block of the second metablock to the first metablock.Type: ApplicationFiled: December 28, 2006Publication date: July 3, 2008Inventors: Andrew Tomlin, Sergey Anatolievich Gorobets, Shai Traister
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Publication number: 20080162787Abstract: In accordance with various embodiments of the present invention, a system for block relinking during garbage collection is described. The system may include a non-volatile memory storage system including a memory configured to store a storage system firmware, a non-volatile memory cell array configured to maintain a first metablock, the first metablock comprising a block of the first metablock, and a processor in communication with the memory and the non-volatile memory cell array, the processor being configured to execute the storage system firmware stored in the memory, the storage system firmware comprising program instructions for writing a memory write to update a block of a first metablock to a block of a second metablock, copying valid portions of the block of the first metablock to the block of the second metablock, and linking the block of the second metablock to the first metablock.Type: ApplicationFiled: December 28, 2006Publication date: July 3, 2008Inventors: Andrew Tomlin, Sergey Anatolievich Gorobets, Shai Traister
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Publication number: 20080091872Abstract: A re-programmable non-volatile memory system, such as a flash EEPROM system, having its memory cells grouped into blocks of cells that are simultaneously erasable is operated to perform memory system housekeeping operations in the foreground during execution of a host command, wherein the housekeeping operations are unrelated to execution of the host command. Both one or more such housekeeping operations and execution of the host command are performed within a time budget established for executing that particular command. One such command is to write data being received to the memory. One such housekeeping operation is to level out the wear of the individual blocks that accumulates through repetitive erasing and re-programming.Type: ApplicationFiled: December 3, 2007Publication date: April 17, 2008Inventors: Alan Bennett, Sergey Gorobets, Andrew Tomlin, Charles Schroter
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Publication number: 20080082773Abstract: In a nonvolatile memory system, a host allocates clusters and records allocation information in a File Allocation Table that is stored in the nonvolatile memory. A controller separately allocates certain data and records allocation in a record in a volatile memory. File Allocation Table information provided to the host is modified according to the record in the volatile memory.Type: ApplicationFiled: September 29, 2006Publication date: April 3, 2008Inventors: Andrew Tomlin, Sergey Anatolievich Gorobets
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Publication number: 20080082774Abstract: In a nonvolatile memory system, a host allocates clusters and records allocation information in a File Allocation Table that is stored in the nonvolatile memory. A controller separately allocates certain data and records allocation in a record in a volatile memory. File Allocation Table information provided to the host is modified according to the record in the volatile memory.Type: ApplicationFiled: September 29, 2006Publication date: April 3, 2008Inventors: Andrew Tomlin, Sergey Anatolievich Gorobets
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Patent number: 7315917Abstract: A re-programmable non-volatile memory system, such as a flash EEPROM system, having its memory cells grouped into blocks of cells that are simultaneously erasable is operated to perform memory system housekeeping operations in the foreground during execution of a host command, wherein the housekeeping operations are unrelated to execution of the host command. Both one or more such housekeeping operations and execution of the host command are performed within a time budget established for executing that particular command. One such command is to write data being received to the memory. One such housekeeping operation is to level out the wear of the individual blocks that accumulates through repetitive erasing and re-programming.Type: GrantFiled: December 19, 2005Date of Patent: January 1, 2008Assignee: SanDisk CorporationInventors: Alan David Bennett, Sergey Anatolievich Gorobets, Andrew Tomlin, Charles Schroter
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Publication number: 20070033581Abstract: The present invention presents a non-volatile memory system that adapts its performance to one or more system related situation. If a situation occurs where the memory will require more than the allotted time for completing an operation, the memory can switch from its normal operating mode to a high performance mode in order to complete the operation quickly enough. Conversely, if a situation arises where reliability could be an issue (such as partial page programming), the controller could switch to a high reliability mode. In either case, once the trigging system situation has returned to normal, the memory reverts to the normal operation. The detection of such situations can be used both for programming and data relocation operations. An exemplary embodiment is based on firmware programmable performance.Type: ApplicationFiled: August 2, 2005Publication date: February 8, 2007Inventors: Andrew Tomlin, Carlos Gonzalez
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Publication number: 20060161728Abstract: A re-programmable non-volatile memory system, such as a flash EEPROM system, having its memory cells grouped into blocks of cells that are simultaneously erasable is operated to perform memory system housekeeping operations in the foreground during execution of a host command, wherein the housekeeping operations are unrelated to execution of the host command. Both one or more such housekeeping operations and execution of the host command are performed within a time budget established for executing that particular command. One such command is to write data being received to the memory. One such housekeeping operation is to level out the wear of the individual blocks that accumulates through repetitive erasing and re-programming.Type: ApplicationFiled: December 19, 2005Publication date: July 20, 2006Inventors: Alan Bennett, Sergey Gorobets, Andrew Tomlin, Charles Schroter
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Publication number: 20060161724Abstract: A re-programmable non-volatile memory system, such as a flash EEPROM system, having its memory cells grouped into blocks of cells that are simultaneously erasable is operated to perform memory system housekeeping operations in the foreground during execution of a host command, wherein the housekeeping operations are unrelated to execution of the host command. Both one or more such housekeeping operations and execution of the host command are performed within a time budget established for executing that particular command. One such command is to write data being received to the memory. One such housekeeping operation is to level out the wear of the individual blocks that accumulates through repetitive erasing and re-programming.Type: ApplicationFiled: January 20, 2005Publication date: July 20, 2006Inventors: Alan Bennett, Sergey Gorobets, Andrew Tomlin, Charles Schroter
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Publication number: 20060156189Abstract: The present invention presents methods for improving data relocation operations. In one aspect, rather than check the quality of the data based on its associated error correction code (ECC) in every relocation operation, it is determined whether to check ECC based on predetermined selection criteria, and if ECC checking is not selected, causing the memory to perform an on-chip copy the data from a first location to a second location. If ECC checking is selected, the data is transferred to the controller and checked; when an error is found, a correction operation is performed and when no error is found, an on-chip copy is performed. The predetermined selection criteria may comprise a sampling mechanism, which may be random based or deterministic. In another aspect, data transfer flags are introduced to indicate data has been corrected and should be transferred back to the memory. A further aspect considers the header and user data separately if each has a distinct associated ECC.Type: ApplicationFiled: December 21, 2004Publication date: July 13, 2006Inventor: Andrew Tomlin
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Publication number: 20060022054Abstract: A memory card that adapts its operation according to the application to which it applied or the conditions under which it is operated. This allows the card to dynamical self optimize. In a first set of embodiments, the card uses host profiling where it will learn about the host during host-card interactions and the card's controller will optimize its algorithms accordingly. In another set of embodiments, the host and card will report to one another their capabilities for a quality of service negotiation. A further set of embodiments allows the storage device to memorize access sequences issued by the host under various predefined conditions, such as host reset or a power on boot sequence. The storage device can use this information to optimize operation for the expected commands. On deviation from an expected sequence, the device would memorize the new command sequence and save it, thus operating in a self-adaptive manner.Type: ApplicationFiled: July 28, 2004Publication date: February 2, 2006Inventors: Reuven Elhamias, Andrew Tomlin, Wesley Brewer, Yosi Pinto, Micky Holtzman
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Publication number: 20050160217Abstract: Multiple copies of firmware code for controlling operation of a non-volatile flash memory system are stored at different suitable locations of the flash memory of a memory system. A map of addresses of these locations is also stored in the flash memory. Upon initialization of the memory system, boot code stored in the memory controller is executed by its microprocessor to reference the address map and load one copy of the firmware from the flash memory into a controller memory, from which it may then be executed by the microprocessor to operate the memory system to store and retrieve user data. An error correction code (ECC) is used to check the data but the best portions of the two or more firmware copies stored in the flash memory are used to reduce the need to use ECC. The firmware code may be stored in the flash memory in two-states when user data is stored in the same memory in more than two-states.Type: ApplicationFiled: December 31, 2003Publication date: July 21, 2005Inventors: Carlos Gonzalez, Andrew Tomlin