Patents by Inventor Andrew W. Reynolds

Andrew W. Reynolds has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Three input field programmable gate array logic circuit configurable as a three input look up table, a D-latch or a D flip-flop
    Patent number: 7477071
    Abstract: A field programmable gate array logic cell includes a logic circuit having three inputs and at least one output and a plurality of multiplexers having inputs and outputs. The logic circuit also includes a plurality of programmable elements coupled between the three inputs and at least one output of the logic circuit and the inputs and outputs of the plurality of multiplexers such that a plurality of sequential logic units and combinatorial units can be realized by programming selected ones of the programmable elements, the sequential logic units may include a flip-flop.
    Type: Grant
    Filed: March 11, 2008
    Date of Patent: January 13, 2009
    Assignee: Actel Corporation
    Inventors: Alan B. Reynolds, Andrew W. Reynolds, Volker Hecht
  • THREE INPUT FIELD PROGRAMMABLE GATE ARRAY LOGIC CIRCUIT CONFIGURABLE AS A THREE INPUT LOOK UP TABLE, A D-LATCH OR A D FLIP- FLOP
    Publication number: 20080150580
    Abstract: A field programmable gate array logic cell includes a logic circuit having three inputs and at least one output and a plurality of multiplexers having inputs and outputs. The logic circuit also includes a plurality of programmable elements coupled between the three inputs and at least one output of the logic circuit and the inputs and outputs of the plurality of multiplexers such that a plurality of sequential logic units and combinatorial units can be realized by programming selected ones of the programmable elements, the sequential logic units may include a flip-flop.
    Type: Application
    Filed: March 11, 2008
    Publication date: June 26, 2008
    Applicant: ACTEL CORPORATION
    Inventors: Alan B. Reynolds, Andrew W. Reynolds, Volker Hecht
  • Three input field programmable gate array logic circuit configurable as a three input look up table, a D-latch or a D flip-flop
    Patent number: 7365567
    Abstract: A field programmable gate array logic cell includes a logic circuit having three inputs and at least one output and a plurality of multiplexers having inputs and outputs. The logic circuit also includes a plurality of programmable elements coupled between the three inputs and at least one output of the logic circuit and the inputs and outputs of the plurality of multiplexers such that a plurality of sequential logic units and combinatorial units can be realized by programming selected ones of the programmable elements, the sequential logic units may include a flip-flop.
    Type: Grant
    Filed: June 23, 2006
    Date of Patent: April 29, 2008
    Assignee: Actel Corporation
    Inventors: Alan B. Reynolds, Andrew W. Reynolds, Volker Hecht
  • Three input field programmable gate array logic circuit configurable as a three input look up table, a D-latch or a D flip-flop
    Patent number: 7106100
    Abstract: A field programmable gate array logic cell includes a logic circuit having three inputs and at least one output and a plurality of multiplexers having inputs and outputs. The logic circuit also includes a plurality of programmable elements coupled between the three inputs and at least one output of the logic circuit and the inputs and outputs of the plurality of multiplexers such that a plurality of sequential logic units and combinatorial units can be realized by programming selected ones of the programmable elements, the sequential logic units may include a flip-flop.
    Type: Grant
    Filed: June 24, 2004
    Date of Patent: September 12, 2006
    Assignee: Actel Corporation
    Inventors: Alan B. Reynolds, Andrew W. Reynolds, Volker Hecht
  • Three input field programmable gate array logic circuit configurable as a three input look up table, a D-latch or a D flip-flop
    Patent number: 6777977
    Abstract: A field programmable gate array logic cell includes a logic circuit having three inputs and at least one output and a plurality of multiplexers having inputs and outputs. The logic circuit also includes a plurality of programmable elements coupled between the three inputs and at least one output of the logic circuit and the inputs and outputs of the plurality of multiplexers such that a plurality of sequential logic units and combinatorial units can be realized by programming selected ones of the programmable elements, the sequential logic units may include a flip-flop.
    Type: Grant
    Filed: May 1, 2002
    Date of Patent: August 17, 2004
    Assignee: Actel Corporation
    Inventors: Alan B. Reynolds, Andrew W. Reynolds, Volker Hecht