Abstract: An integrated circuit for an imaging system is disclosed. In one aspect, an integrated circuit has an array of optical sensors, an array of optical filters integrated with the sensors and configured to pass a band of wavelengths onto one or more of the sensors, and read out circuitry to read out pixel values from the sensors to represent an image. Different ones of the optical filters are configured to have a different thickness, to pass different bands of wavelengths by means of interference, and to allow detection of a spectrum of wavelengths. The read out circuitry can enable multiple pixels under one optical filter to be read out in parallel. The thicknesses may vary non monotonically across the array. The read out, or later image processing, may involve selection or interpolation between wavelengths, to carry out spectral sampling or shifting, to compensate for thickness errors.

Abstract: A spectral camera for producing a spectral output is disclosed. The spectral camera has an objective lens for producing an image, an array of mirrors, an array of filters for passing a different passband of the optical spectrum for different ones of the optical channels arranged so as to project multiple of the optical channels onto different parts of the same focal plane, and a sensor array at the focal plane to detect the filtered image copies simultaneously. By using mirrors, there may be less optical degradation and the trade off of cost with optical quality can be better. By projecting the optical channels onto different parts of the same focal plane a single sensor or coplanar multiple sensors can to be used to detect the different optical channels simultaneously which promotes simpler alignment and manufacturing.

Abstract: A spectral camera for producing a spectral output is disclosed. The spectral camera has an objective lens for producing an image, a mosaic of filters for passing different bands of the optical spectrum, and a sensor array arranged to detect pixels of the image at the different bands passed by the filters, wherein for each of the pixels, the sensor array has a cluster of sensor elements for detecting the different bands, and the mosaic has a corresponding cluster of filters of different bands, integrated on the sensor element so that the image can be detected simultaneously at the different bands. Further, the filters are first order Fabry-Perot filters, which can give any desired passband to give high spectral definition. Cross talk can be reduced since there is no longer a parasitic cavity.

Abstract: A spectral camera for producing a spectral output is disclosed. The spectral camera has an objective lens for producing an image, an optical duplicator, an array of filters, and a sensor array arranged to detect the filtered image copies simultaneously on different parts of the sensor array. Further, a field stop defines an outline of the image copies projected on the sensor array. The filters are integrated on the sensor array, which has a planar structure without perpendicular physical barriers for preventing cross talk between each of the adjacent optical channels. The field stop enables adjacent image copies to fit together without gaps for such barriers. The integrated filters mean there is no parasitic cavity causing crosstalk between the adjacent image copies. This means there is no longer a need for barriers between adjacent projected image copies, and thus sensor area can be better utilized.

Abstract: A spectral camera having an objective lens, an array of lenses for producing optical copies of segments of the image, an array of filters for the different optical channels and having an interleaved spatial pattern, and a sensor array to detect the copies of the image segments is disclosed. Further, detected segment copies of spatially adjacent optical channels have different passbands and represent overlapping segments of the image, and detected segment copies of the same passband on spatially non-adjacent optical channels represent adjacent segments of the image which fit together. Having segments of the image copied can help enable better optical quality for a given cost. Having an interleaved pattern of the filter bands with overlapping segments enables each point of the image to be sensed at different bands to obtain the spectral output for many bands simultaneously to provide better temporal resolution.

Abstract: A solid-state spectral imaging device is described. The device includes an image sensor and a plurality of optical filters directly processed on top of the image sensor. Each optical filter includes a first mirror and a second mirror defining an optical filter cavity having a fixed height. Each optical filter also includes a first electrode and a second electrode having a fixed position located opposite to each other and positioned to measure the height of the optical filter cavity. Further, a method to calibrate spectral data of light and a computer program for calibrating light is described.

Abstract: An integrated circuit for an imaging system is disclosed. In one aspect, an integrated circuit has an array of optical sensors, an array of optical filters integrated with the sensors and configured to pass a band of wavelengths onto one or more of the sensors, and read out circuitry to read out pixel values from the sensors to represent an image. Different ones of the optical filters are configured to have a different thickness, to pass different bands of wavelengths by means of interference, and to allow detection of a spectrum of wavelengths. The read out circuitry can enable multiple pixels under one optical filter to be read out in parallel. The thicknesses may vary non monotonically across the array. The read out, or later image processing, may involve selection or interpolation between wavelengths, to carry out spectral sampling or shifting, to compensate for thickness errors.

Abstract: A method and system for converting application code into optimized application code or into execution code suitable for execution on a computation engine with an architecture comprising at least a first and a second level of data memory units are disclosed. In one aspect, the method comprises obtaining application code, the application code comprising data transfer operations between the levels of memory units. The method further comprises converting at least a part of the application code. The converting of application code comprises scheduling of data transfer operations from a first level of memory units to a second level of memory units such that accesses of data accessed multiple times are brought closer together in time than in the original code.

Abstract: A system and method for converting on a computer environment a first code into a second code to improve performance or lower energy consumption on a targeted programmable platform is disclosed. The codes represent an application. In one aspect, the method includes loading on the computer environment the first code and for at least part of the variables within the code the bit width required to have the precision and overflow behavior as demanded by the application. The method further includes converting the first code into the second code by grouping operations of the same type on the variables for joint execution on a functional unit of the targeted programmable platform, the grouping operations using the required bit width, wherein the functional unit supports one or more bit widths, the grouping operation being selected to use at least partially one of the supported bit widths.

Abstract: A method and system for converting application code into optimized application code or into execution code suitable for execution on a computation engine with an architecture comprising at least a first and a second level of data memory units are disclosed. In one aspect, the method comprises obtaining application code, the application code comprising data transfer operations between the levels of memory units. The method further comprises converting at least a part of the application code. The converting of application code comprises scheduling of data transfer operations from a first level of memory units to a second level of memory units such that accesses of data accessed multiple times are brought closer together in time than in the original code.

Abstract: A computer system optimized for real-time applications which provides increased performance over current computer architectures. The system includes a standard local system bus or expansion bus, such as the PCI bus, and also includes a dedicated real-time bus or multimedia bus. Various multimedia devices are coupled to one or more of the expansion bus and/or the multimedia bus. The multimedia bus is preferably time sliced wherein time slices or time slots are allocated in proportion to the required bandwidth. Each multimedia device includes programmable time slotting logic which determines the appropriate time slot. In one embodiment, the time slices are each a constant size and a number of the equal sized time slots are allocated to respective data streams in proportion to the required bandwidth. Alternatively, the time slots are dynamically sized or allocated to data streams in proportion to the required bandwidth.

Abstract: A computer system optimized for real-time applications which provides increased performance over current computer architectures. The system includes a standard local system bus, such as the PCI bus, and also includes a dedicated real-time bus or multimedia bus. Thus multimedia devices such as video cards, audio cards, etc., as well as communications devices, transfer real-time data through a separate bus without requiring arbitration for the PCI bus. The computer system of the present invention thus provides much greater performance for real-time applications than prior systems. In various embodiments, multimedia devices transmit addressing and control information for a multimedia bus transfer either over the PCI bus or using a separate serial control channel. The multimedia bus may also comprise separate multimedia channels for different data types.

Abstract: A computer system and method optimized for real-time multimedia applications are presented. The computer system, including a dedicated multimedia engine coupled directly to a real-time data cache, provides increased performance over current computer architectures. The multimedia engine includes at least one DSP engines which couple through at least one I/O channels to I/O ports. Obtaining multimedia commands and data from main memory and/or the real-time data cache, the multimedia engine performs a number of multimedia operations including audio and video functions. A CPU, coupled through a chip set logic or bridge logic to the main memory, generates multimedia commands and data. The CPU groups multimedia commands and data into separate command and data elements, and writes the command and data elements to a multimedia address space in main memory. The CPU also writes element structure information to the multimedia address space.

Abstract: A computer system and method for transferring multimedia commands and data to a dedicated multimedia engine and/or multimedia memory, wherein the multimedia engine provides increased performance for real-time applications over current computer architectures. The system includes a dedicated multimedia engine coupled directly to the main memory which performs real-time operations, including audio and video function, as well as others. The multimedia engine includes multimedia memory and one or more DSP engines. The CPU writes video and/or audio commands and data to the main memory. The CPU also preferably writes data structure information to the DMA engine which includes the main memory address where the commands and data reside. The DMA engine uses this information to retrieve the commands and data from main memory into the multimedia memory. The DMA engine preferably operates concurrently with the multimedia engine, thus allowing for improved performance.

Abstract: A computer system optimized for real-time applications which provides increased performance over current computer architectures. The system includes a standard local bus, such as the PCI bus, and also includes a dedicated real-time bus or multimedia bus. The PCI bus and the multimedia bus are comprised on the motherboard and include connector slots for receiving add-in cards. Multimedia device expansion cards each include two connectors which correspond to the PCI bus and the multimedia bus. Thus multimedia devices such as video cards, audio cards, etc., as well as communications devices, transfer real-time data through a separate bus without requiring arbitration for the PCI bus. The computer system of the present invention thus provides much greater performance for real-time applications than prior systems.

Abstract: A computer system optimized for real-time applications which provides increased performance over current computer architectures. The system includes a standard local system bus, such as the PCI bus, and also includes a dedicated real-time bus or multimedia bus. Thus multimedia devices such as video cards, audio cards, etc., as well as communications devices, transfer real-time data through a separate bus without requiring arbitration for the PCI bus. The computer system of the present invention thus provides much greater performance for real-time applications than prior systems. In various embodiments, multimedia devices transmit addressing and control information for a multimedia bus transfer either over the PCI bus or using a separate serial control channel. The multimedia bus may also comprise separate multimedia channels for different data types.

Abstract: A computer system including separate digital and analog system chips which provides increased performance over current computer architectures. The computer system of the present invention includes a digital system chip which performs various digital functions, including multimedia functions and chipset functions, and a separate analog chip which performs analog functions, including digital to analog and analog to digital conversions. Thus the present invention optimizes silicon use and design by splitting up digital and analog functions on separate chips. The system of the present invention also separates digital noise from analog noise, allowing a higher degree of integration while increasing stability.

Abstract: A computer system optimized for real-time applications which provides increased performance over current computer architectures. The system includes a standard local bus, such as the PCI bus, and also includes a dedicated real-time bus or multimedia bus. The PCI bus and the multimedia bus are comprised on the motherboard and include connector slots for receiving add-in cards. Multimedia device expansion cards each include two connectors which correspond to the PCI bus and the multimedia bus. Thus multimedia devices such as video cards, audio cards, etc., as well as communications devices, transfer real-time data through a separate bus without requiring arbitration for the PCI bus. The computer system of the present invention thus provides much greater performance for real-time applications than prior systems.

Abstract: A computer system optimized for real-time applications which provides increased performance over current computer architectures. The system includes a standard local bus, such as the PCI bus, and also includes a dedicated real-time bus or multimedia bus. The PCI bus and the multimedia bus are comprised on the motherboard. One or more PCI devices or multimedia devices are comprised on the motherboard and are coupled to the PCI bus and the multimedia bus. In one embodiment, the motherboard includes PCI bus and multimedia bus connector slots for receiving add-in cards. In this embodiment, multimedia device expansion cards each include two connectors which correspond to the PCI bus and the multimedia bus. Thus multimedia devices such as video cards, audio cards, etc., as well as communications devices, transfer real-time data through a separate bus without requiring arbitration for the PCI bus.

Abstract: A computer system including separate digital and analog system chips which provides increased performance over current computer architectures. The computer system of the present invention includes a digital system chip which performs various digital functions, including multimedia functions and chipset functions, and a separate analog chip which performs analog functions, including digital to analog and analog to digital conversions. Thus the present invention optimizes silicon use and design by splitting up digital and analog functions on separate chips. The system of the present invention also separates digital noise from analog noise, allowing a higher degree of integration while increasing stability.