Patents by Inventor Angelo R. Mastrocola

Angelo R. Mastrocola has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9264009
    Abstract: A coupling apparatus having plurality of branches and a resistive element is disclosed. Each branch may be configured to couple at least one of (i) a first input node and (ii) a second input node to a first output node through a plurality of switches and a plurality of capacitors. The resistive element generally connects the first output node to a second output node. The first output node may be loaded by a respective parasitic capacitance of at least one of the switches.
    Type: Grant
    Filed: May 6, 2013
    Date of Patent: February 16, 2016
    Assignee: Avago Technologies General IP (Singapore) Pte. Ltd.
    Inventors: Jun Tian, Angelo R. Mastrocola, Rodney J. Steffes, Douglas J. Spannring, Ming Chen
  • Patent number: 9129651
    Abstract: A magnetic recording system includes an array of analog inputs operable to receive analog signals retrieved from a magnetic storage medium, a quadrature amplitude modulator operable to combine the analog signals to yield a quadrature amplitude modulated signal, a quadrature amplitude demodulator operable to yield a plurality of demodulated signals from the quadrature amplitude modulated signal corresponding to each channel of the array, and a joint equalizer operable to filter the plurality of demodulated signals to yield an equalized output.
    Type: Grant
    Filed: October 8, 2013
    Date of Patent: September 8, 2015
    Assignee: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
    Inventors: George Mathew, Angelo R. Mastrocola, Robert A. Greene
  • Publication number: 20150062730
    Abstract: A magnetic recording system includes an array of analog inputs operable to receive analog signals retrieved from a magnetic storage medium, a quadrature amplitude modulator operable to combine the analog signals to yield a quadrature amplitude modulated signal, a quadrature amplitude demodulator operable to yield a plurality of demodulated signals from the quadrature amplitude modulated signal corresponding to each channel of the array, and a joint equalizer operable to filter the plurality of demodulated signals to yield an equalized output.
    Type: Application
    Filed: October 8, 2013
    Publication date: March 5, 2015
    Applicant: LSI Corporation
    Inventors: George Mathew, Angelo R. Mastrocola, Robert A. Greene
  • Patent number: 8941433
    Abstract: A coupling apparatus having a first branch and a second branch is disclosed. The first branch generally comprises (A) a first switch group configured to connect an input signal to an output node through a first capacitor, and (B) second switch group configured to connect either (i) a second signal, or (ii) a ground voltage, to the output node through a second capacitor. The second branch generally comprises (A) a third switch group configured to connect the input signal to the output node through a third capacitor, and (B) a fourth switch group configured to connect either (i) the second signal, or (ii) the ground voltage, to the output node through a fourth capacitor.
    Type: Grant
    Filed: May 6, 2013
    Date of Patent: January 27, 2015
    Assignee: Avago Technologies General IP (Singapore) Pte. Ltd.
    Inventors: Jun Tian, Angelo R. Mastrocola, Rodney J. Steffes, Douglas J. Spannring, Ming Chen
  • Patent number: 8929013
    Abstract: A storage system with pattern dependent write includes a magnetic write head, a magnetic storage medium, a read channel operable to process write data to be recorded on the magnetic storage medium by the magnetic write head, and a preamplifier operable to receive the write data and an associated clock from the read channel, to generate a pattern dependent write control signal based on a pattern in the write data and on the clock, and to set a write current level through the magnetic write head to a number of different current levels based on the pattern dependent write control signal.
    Type: Grant
    Filed: November 21, 2013
    Date of Patent: January 6, 2015
    Assignee: LSI Corporation
    Inventors: Angelo R. Mastrocola, David W. Kelly, Ross S. Wilson, Jason P. Brenden
  • Patent number: 6215331
    Abstract: In a sense amp/latch, the reset/sense phase of the sense amp/latch is separated into two separately controllable operations. By separating the reset/sense phase into two separately controllable operations, the parameters associated with optimization (speed and/or completeness of reset vs. larger gain during sensing) are substantially independent of each other and therefore do not conflict with each other. The separation of the reset/sense phase into two separately controllable operations is accomplished by setting a load impedance of the sense amp/latch to a first level during a reset phase, to a second level during a sensing phase, and to a third level during a latching phase.
    Type: Grant
    Filed: February 2, 1998
    Date of Patent: April 10, 2001
    Assignee: Agere Systems Inc.
    Inventors: Palaksha A. Setty, Angelo R. Mastrocola
  • Patent number: 6043715
    Abstract: A phase-locked loop (PLL) has a master circuit configured to a slave circuit. The slave circuit has a phase detector, a charge pump, a loop filter, and a voltage-controlled oscillator configured to operate as a closed-loop PLL. The master circuit has a phase detector and a charge pump that are similar to the corresponding components in the slave circuit. The master circuit is configured to receive two input signals with zero phase offset. As such, any net current charge generated by the master charge pump will be indicative of mismatch within the master phase detector and charge pump, and therefore, by analogy, indicative of mismatch within the slave phase detector and charge pump, as well. A voltage signal generated by the master circuit is applied to control the generation of currents by the slave charge pump in such a way as to compensate for static phase offset that would otherwise exist in the slave circuit.
    Type: Grant
    Filed: September 1, 1998
    Date of Patent: March 28, 2000
    Assignee: Lucent Technologies Inc.
    Inventors: James A. Bailey, Angelo R. Mastrocola, Jeffrey L. Sonntag, William B. Wilson
  • Patent number: 5812024
    Abstract: The gain-bandwidth product for an integrated circuit is stabilized by operating a first capacitance element that tracks a load capacitance of an integrated circuit to be stabilized over a given range of ambient operating conditions, and operating a first control element having a control terminal and first and second controlled terminals in a triode operating region. The conductance of the first control element is set to correspond to an effective conductance of the first capacitance element by developing a feedback control voltage and coupling the control voltage to the control terminal of the first control element. The control voltage is also coupled to a control terminal of a second control element, and a controlled terminal current of the second control element is coupled to the integrated circuit to be stabilized while operating the second control element in a saturation region.
    Type: Grant
    Filed: January 30, 1997
    Date of Patent: September 22, 1998
    Assignee: Lucent Technologies Inc.
    Inventor: Angelo R. Mastrocola
  • Patent number: 5596302
    Abstract: A ring oscillator having an even number of differential amplifier stages is disclosed wherein each stage includes a differential amplifier using two N-channel MOSFETs whose gates serve as the inputs and whose drains serve as the outputs of the stage. The sources of the two MOSFETs are connected together and to a current sink consisting of a cascoded structure of N-channel MOSFETs. The drains of each of the two N-channel MOSFETs serving as the differential amplifier are each connected to a respective current source provided by a P-channel MOSFET. All of the current sinks in the stages are connected as secondary legs of a first current mirror which establishes a current of I in the sinks. All of the current sources are connected as secondary legs of a second current mirror which attempts to establish a current of (1+.varies.)I/2 in each of the sources, where .varies. is a number greater than zero.
    Type: Grant
    Filed: January 17, 1996
    Date of Patent: January 21, 1997
    Assignee: Lucent Technologies Inc.
    Inventors: Angelo R. Mastrocola, Jeffrey L. Sonntag