Patents by Inventor Anh Chuong Tran

Anh Chuong Tran has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220247147
    Abstract: A semiconductor laser and a fabrication method therefor. The method comprises: providing a heat sink motherboard, and cutting the heat sink motherboard to form a plurality of heat sink substrates (300) (S11); providing an epitaxial wafer (200) (S12); bonding the plurality of heat sink substrates (300) to the epitaxial wafer (200) in an array to form a plurality of gaps parallel to the direction of resonant cavities (210) and perpendicular to the direction of the resonant cavities (210) (S13); dividing the epitaxial wafer (200) along the gaps to obtain a plurality of laser chips (S14); and stacking the plurality of laser chips, and coating the plurality of stacked laser chips to form a plurality of semiconductor lasers (S15).
    Type: Application
    Filed: October 16, 2019
    Publication date: August 4, 2022
    Inventors: CHAO-CHEN CHENG, ANH CHUONG TRAN
  • Publication number: 20220136125
    Abstract: Disclosed are a manufacturing method for a laser chip and a laser chip. The manufacturing method comprises: step S1, forming a first electroplating substrate on an epitaxial layer; step S2, forming an organic pattern layer on the first electroplating substrate, wherein the pattern layer defines a hollowed-out area and a part of the first electroplating substrate is exposed to the pattern layer by means of the hollowed-out area; step S3, forming a first metal coating on the first electroplating substrate, wherein the first metal coating completely covers the pattern layer and the part of the first electroplating substrate not covered by the pattern layer; and step S4, removing the pattern layer to have a hollow channel formed between the first metal coating and the first electroplating substrate, wherein the channel is provided with at least one inlet and at least one outlet running through the first metal coating.
    Type: Application
    Filed: December 11, 2019
    Publication date: May 5, 2022
    Applicants: SHENZHEN LASER INSTITUTE, SHENZHEN LASER INSTITUTE
    Inventors: ANH CHUONG TRAN, CHAO-CHEN CHENG
  • Publication number: 20220059986
    Abstract: A semiconductor laser chip and a preparation method therefor, the method comprising: providing an epitaxial wafer (100), the epitaxial wafer (100) comprising a plurality of resonant cavities (110) arranged in parallel; providing a heat sink substrate (200); attaching the epitaxial wafer (100) to the heat sink substrate (200) so as to form a first chip semi-finished product (10); performing first division on the first chip semi-finished product (10) in the direction perpendicular to the resonant cavities (110) so as to divide the first chip semi-finished product (10) into a plurality of second chip semi-finished products (20); and performing second division on the second chip semi-finished products (20) in the direction parallel to the resonant cavities (110) so as to divide the second chip semi-finished products (20) into a plurality of semiconductor laser chips (30) such that the semiconductor laser chips (30) comprise at least one laser bar.
    Type: Application
    Filed: October 16, 2019
    Publication date: February 24, 2022
    Inventors: CHAO-CHEN CHENG, ANH CHUONG TRAN
  • Patent number: 7781247
    Abstract: A method of producing one or more vertical light-emitting diode (VLED) dies having a light-emitting diode (LED) stack comprising Group III-Group V combinations of elements (e.g., GaN, AlN, InN, AlGaN, InGaN, and InAlGaN) and a metal substrate is provided. The techniques include forming an InGaN or InAlGaN interface layer above a suitable growth-supporting substrate, such as sapphire or silicon carbide (SiC), and forming the LED stack above the interface layer. Such an interface layer may absorb a majority of the energy from a laser pulse used during laser lift-off of the growth-supporting substrate in an effort to prevent damage to the light emitting layers of the LED stack, which may result in improved brightness performance over VLED dies produced with conventional buffer layers.
    Type: Grant
    Filed: October 26, 2006
    Date of Patent: August 24, 2010
    Assignee: SemiLEDs Optoelectronics Co., Ltd.
    Inventor: Anh Chuong Tran
  • Patent number: 7615789
    Abstract: A vertical light-emitting diode (VLED) structure that may impart increased luminous efficiency over conventional LEDs and VLEDs is described. As additional benefits, some embodiments may have less susceptibility to electrostatic discharge (ESD) and higher manufacturing yields than conventional devices. To accomplish these benefits, embodiment of the invention may utilize a spacer or other means to separate the p-doped layer from the active layer, thereby increasing the distance between the active layer and the reflective layer within the VLED structure.
    Type: Grant
    Filed: May 9, 2006
    Date of Patent: November 10, 2009
    Assignee: SemiLEDs Optoelectronics Co., Ltd.
    Inventor: Anh Chuong Tran
  • Publication number: 20080099780
    Abstract: A method of producing one or more vertical light-emitting diode (VLED) dies having a light-emitting diode (LED) stack comprising Group III-Group V combinations of elements (e.g., GaN, AlN, InN, AlGaN, InGaN, and InAlGaN) and a metal substrate is provided. The techniques include forming an InGaN or InAlGaN interface layer above a suitable growth-supporting substrate, such as sapphire or silicon carbide (SiC), and forming the LED stack above the interface layer. Such an interface layer may absorb a majority of the energy from a laser pulse used during laser lift-off of the growth-supporting substrate in an effort to prevent damage to the light emitting layers of the LED stack, which may result in improved brightness performance over VLED dies produced with conventional buffer layers.
    Type: Application
    Filed: October 26, 2006
    Publication date: May 1, 2008
    Inventor: ANH CHUONG TRAN