Patents by Inventor Aniket DATTA

Aniket DATTA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Analog-to-digital converter (ADC) having selective comparator offset error tracking and related corrections
    Patent number: 11955984
    Abstract: An analog-to-digital converter (ADC) includes: a set of comparators configured to provide comparison results based on an analog signal and respective reference thresholds for comparators of the set of comparators; digitization circuitry configured to provide a digital output code based on the comparison results and a mapping; and calibration circuitry. The calibration circuitry is configured to: receive the comparison results; determine if the analog signal is proximate to one of the respective reference thresholds based on the comparison results; in response to determining the analog signal is proximate to one of the respective reference thresholds, receive ADC values based on different pseudorandom binary sequence (PRBS) values being applied to the analog signal; determine an offset error based on the ADC values; and provide a comparator input offset calibration signal at a calibration circuitry output if the estimated offset error is greater than an offset error threshold.
    Type: Grant
    Filed: May 31, 2022
    Date of Patent: April 9, 2024
    Assignee: Texas Instruments Incorporated
    Inventors: Viswanathan Nagarajan, Aniket Datta, Nithin Gopinath
  • ANALOG-TO-DIGITAL CONVERTER (ADC) HAVING SELECTIVE COMPARATOR OFFSET ERROR TRACKING AND RELATED CORRECTIONS
    Publication number: 20230387933
    Abstract: An analog-to-digital converter (ADC) includes: a set of comparators configured to provide comparison results based on an analog signal and respective reference thresholds for comparators of the set of comparators; digitization circuitry configured to provide a digital output code based on the comparison results and a mapping; and calibration circuitry. The calibration circuitry is configured to: receive the comparison results; determine if the analog signal is proximate to one of the respective reference thresholds based on the comparison results; in response to determining the analog signal is proximate to one of the respective reference thresholds, receive ADC values based on different pseudorandom binary sequence (PRBS) values being applied to the analog signal; determine an offset error based on the ADC values; and provide a comparator input offset calibration signal at a calibration circuitry output if the estimated offset error is greater than an offset error threshold.
    Type: Application
    Filed: May 31, 2022
    Publication date: November 30, 2023
    Inventors: Viswanathan NAGARAJAN, Aniket DATTA, Nithin GOPINATH