Abstract: Methods and systems for sensing memory cells using a sense amplifier that can support both ramp sensing and conventional sensing are described. With ramp sensing, a word line of a memory array may be ramped up linearly and a sensing operation may be performed by the sense amplifier while the word line is continuously being ramped up. In this case, during the sensing operation, the sense amplifier may sense a bit line of the memory array connected to a memory cell while the word line is ramping up and then transfer the result into a data latch. In contrast, with conventional sensing, a bit line of the memory array may be first precharged to a particular voltage level (e.g., a read voltage level) and then sensed while the word line is held at the particular voltage level.

Abstract: Methods and systems for sensing memory cells using a sense amplifier that can support both ramp sensing and conventional sensing are described. With ramp sensing, a word line of a memory array may be ramped up linearly and a sensing operation may be performed by the sense amplifier while the word line is continuously being ramped up. In this case, during the sensing operation, the sense amplifier may sense a bit line of the memory array connected to a memory cell while the word line is ramping up and then transfer the result into a data latch. In contrast, with conventional sensing, a bit line of the memory array may be first precharged to a particular voltage level (e.g., a read voltage level) and then sensed while the word line is held at the particular voltage level.