Patents by Inventor Anitha Kona

Anitha Kona has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8976200
    Abstract: In one embodiment, a display controller comprises control logic that rotates a frame image by two-dimensional blocks of pixels when the frame image is rotated from an original orientation.
    Type: Grant
    Filed: March 12, 2010
    Date of Patent: March 10, 2015
    Assignee: Marvell International Ltd.
    Inventors: Anitha Kona, Susan Lin
  • Publication number: 20140189371
    Abstract: In an embodiment, an apparatus includes a cryptographic processor within a wireless device. The cryptographic processor includes at least one cryptographic unit. The cryptographic processor also includes a nonvolatile memory to store one or more microcode instructions, wherein at least one of the one or more microcode instructions is related to a sensitive operation. The cryptographic processor also includes a controller to control execution of the one or more microcode instructions by the at least one cryptographic unit, wherein the controller is to preclude execution of the sensitive operation if the apparatus is within an untrusted state.
    Type: Application
    Filed: March 4, 2014
    Publication date: July 3, 2014
    Inventors: Mark Fullerton, Moinul Khan, David Wheeler, John Brizek, Anitha Kona
  • Patent number: 8756406
    Abstract: In one embodiment the present invention includes a method and apparatus for enabling a main core and one or more co-processors to operate in a de-coupled mode, thereby facilitating the execution of two or more instruction threads in parallel. A co-processor, according to an embodiment of the invention, has a coupling manager including a loop buffer for storing instructions which can be independently fetched and executed by the co-processor when operating in de-coupled mode. In addition, the coupling manager includes a loop descriptor and a counter/condition descriptor. The loop descriptor and condition descriptor work in conjunction with one another to determine what, if any, action should be taken when a co-processor is in a particular processing state, for example, as indicated by a counter keeping track of loop processing.
    Type: Grant
    Filed: January 11, 2013
    Date of Patent: June 17, 2014
    Assignee: Marvell International Ltd.
    Inventors: Moinul Khan, Mark Fullerton, Arthur Miller, Anitha Kona
  • Patent number: 8751818
    Abstract: In an embodiment, an apparatus includes a cryptographic processor within a wireless device. The cryptographic processor includes at least one cryptographic unit. The cryptographic processor also includes a nonvolatile memory to store one or more microcode instructions, wherein at least one of the one or more microcode instructions is related to a sensitive operation. The cryptographic processor also includes a controller to control execution of the one or more microcode instructions by the at least one cryptographic unit, wherein the controller is to preclude execution of the sensitive operation if the apparatus is within an untrusted state.
    Type: Grant
    Filed: January 21, 2009
    Date of Patent: June 10, 2014
    Assignee: Intel Corporation
    Inventors: Moinul H Khan, David Wheeler, John P Brizek, Anitha Kona, Mark N. Fullerton
  • Patent number: 8688947
    Abstract: In one or more embodiments, an apparatus comprises an alignment module implemented in hardware to identify requested data that is not aligned on a natural alignment boundary of a memory and load at least two sets of neighboring data such that each said set includes at least a portion of the requested data. The alignment module is further configured to extract the requested data from the at least two sets of neighboring data and output the extracted data to a processor.
    Type: Grant
    Filed: November 21, 2008
    Date of Patent: April 1, 2014
    Assignee: Marvell International Ltd.
    Inventors: Anitha Kona, Moinul H. Khan, Bradley C. Aldrich
  • Patent number: 8359462
    Abstract: In one embodiment the present invention includes a method and apparatus for enabling a main core and one or more co-processors to operate in a de-coupled mode, thereby facilitating the execution of two or more instruction threads in parallel. A co-processor, according to an embodiment of the invention, has a coupling manager including a loop buffer for storing instructions which can be independently fetched and executed by the co-processor when operating in de-coupled mode. In addition, the coupling manager includes a loop descriptor and a counter/condition descriptor. The loop descriptor and condition descriptor work in conjunction with one another to determine what, if any, action should be taken when a co-processor is in a particular processing state, for example, as indicated by a counter keeping track of loop processing.
    Type: Grant
    Filed: November 21, 2008
    Date of Patent: January 22, 2013
    Assignee: Marvell International Ltd.
    Inventors: Moinul H. Khan, Mark N. Fullerton, Arthur R. Miller, Anitha Kona
  • Patent number: 8351508
    Abstract: Systems and methods are provided for calculating a motion vector for a macroblock between a reference frame and a current frame. The system includes a main processor. The system further includes a programmable video accelerator configured to receive a linked list of variable length descriptor inputs at the direction of the main processor. The descriptor inputs include the macroblock for which the motion vector is to be calculated. The video accelerator is further configured to calculate a motion vector identifying motion of the identified macroblock from the reference frame to the current frame.
    Type: Grant
    Filed: December 10, 2008
    Date of Patent: January 8, 2013
    Assignee: Marvell International Ltd.
    Inventors: Christopher T. Foulds, Timothy R. Cahalan, Moinul H. Khan, Anitha Kona
  • Patent number: 8135853
    Abstract: In one or more embodiments, a method, computer-readable media, system and or modules are capable of generating an address for a multimedia data block included in a stream of multimedia data. The address can be maintained in one or more local registers. The one or more local registers can be linked to one or more processor registers associated with a processor to synchronize communication of the stream of multimedia data with the processor.
    Type: Grant
    Filed: November 13, 2008
    Date of Patent: March 13, 2012
    Assignee: Marvell International Ltd.
    Inventors: Moinul H. Khan, Mark N. Fullerton, Bradley C. Aldrich, Anitha Kona
  • Patent number: 8095775
    Abstract: During operation of a VLIW processor, a very long instruction word is fetched. A portion of the very long instruction word that includes a pointer to an instruction is identified, and the instruction pointed to by the pointer is retrieved from a location of an instruction window. The retrieved instruction is input into a functional unit for execution.
    Type: Grant
    Filed: November 19, 2008
    Date of Patent: January 10, 2012
    Assignee: Marvell International Ltd.
    Inventors: Moinul H. Khan, Anitha Kona, Mark N. Fullerton
  • Patent number: 7636858
    Abstract: In an embodiment, an apparatus includes a trusted cryptographic processor that includes at least one functional unit. The trusted cryptographic processor also includes a controller to receive a primitive instruction that identifies which of the at least one functional unit is to perform an operation, wherein the controller is to reduce power to the at least one functional unit that is not identified by the primitive instruction. The apparatus includes a trusted power management unit to supply the power based on control from the controller, wherein the control is independent of a processor that is not in a trusted state.
    Type: Grant
    Filed: June 30, 2004
    Date of Patent: December 22, 2009
    Assignee: Intel Corporation
    Inventors: Moinul H Khan, Anitha Kona
  • Publication number: 20090282254
    Abstract: In an embodiment, an apparatus includes one or more cryptographic units. The apparatus also includes a memory to store one or more data encryption keys and an associated header for the one or more data encryption keys. The associated header defines which of the one or more cryptographic units are to use the data encryption key.
    Type: Application
    Filed: January 26, 2009
    Publication date: November 12, 2009
    Inventors: David Wheller, John P. Brizek, Moinul H Khan, Anitha Kona
  • Publication number: 20090282263
    Abstract: In an embodiment, an apparatus includes a cryptographic processor within a wireless device. The cryptographic processor includes at least one cryptographic unit. The cryptographic processor also includes a nonvolatile memory to store one or more microcode instructions, wherein at least one of the one or more microcode instructions is related to a sensitive operation. The cryptographic processor also includes a controller to control execution of the one or more microcode instructions by the at least one cryptographic unit, wherein the controller is to preclude execution of the sensitive operation if the apparatus is within an untrusted state.
    Type: Application
    Filed: January 21, 2009
    Publication date: November 12, 2009
    Inventors: Moinul H. Khan, David Wheeler, John P. Brizek, Anitha Kona, Mark N. Fullerton
  • Publication number: 20090282261
    Abstract: In an embodiment, an apparatus includes a trusted cryptographic processor that includes at least one functional unit. The trusted cryptographic processor also includes a controller to receive a primitive instruction that identifies which of the at least one functional unit is to perform an operation, wherein the controller is to reduce power to the at least one functional unit that is not identified by the primitive instruction. The apparatus includes a trusted power management unit to supply the power based on control from the controller, wherein the control is independent of a processor that is not in a trusted state.
    Type: Application
    Filed: June 30, 2004
    Publication date: November 12, 2009
    Inventors: Moinul H. Khan, Anitha Kona
  • Patent number: 7590864
    Abstract: Trusted code may be patched in a manner that resists tampering from non-trusted sources. In some embodiments, the patches may be moved into a patch cache in a trusted processing module for execution.
    Type: Grant
    Filed: May 21, 2004
    Date of Patent: September 15, 2009
    Assignee: Intel Corporation
    Inventors: Moinul H. Khan, Anitha Kona, Mark N. Fullerton, David M. Wheeler, John P. Brizek
  • Patent number: 7321957
    Abstract: During debug operations in one embodiment of a trusted subsystem, passwords may be used to enable and disable access to selected areas, and to make access by different entities mutually exclusive. In another embodiment, programmable units may be used to define what the selected areas of access are for debug operations.
    Type: Grant
    Filed: October 24, 2003
    Date of Patent: January 22, 2008
    Assignee: Intel Corporation
    Inventors: Moinul H. Khan, Mark N. Fullerton, Anitha Kona, Jeffrey S. Boyer
  • Publication number: 20070139445
    Abstract: A graphics system includes a single buffer coupled between a graphics controller and a display controller. The graphics controller rotates a frame generated by an application and writes the rotated frame into the buffer. The rotation is performed a segment (e.g., a quartile of a frame) at a time. Each time the display controller completes displaying a frame quartile, the display controller signals the graphics controller to rotate a corresponding quartile of a next frame. The reduction in buffer space reduces power consumption and improves performance of the system.
    Type: Application
    Filed: December 16, 2005
    Publication date: June 21, 2007
    Inventors: Moinul Khan, Mark Fullerton, Anitha Kona, Patricia Hoover
  • Publication number: 20070002059
    Abstract: A display system includes a controller capable of compressing pixel data, and a display module capable of decompressing pixel data.
    Type: Application
    Filed: June 29, 2005
    Publication date: January 4, 2007
    Inventors: Lawrence Booth, Anitha Kona
  • Publication number: 20050262360
    Abstract: Trusted code may be patched in a manner that resists tampering from non-trusted sources. In some embodiments, the patches may be moved into a patch cache in a trusted processing module for execution.
    Type: Application
    Filed: May 21, 2004
    Publication date: November 24, 2005
    Inventors: Moinul Khan, Anitha Kona, Mark Fullerton, David Wheeler, John Brizek
  • Publication number: 20050132186
    Abstract: In an embodiment, an apparatus includes a cryptographic processor within a wireless device. The cryptographic processor includes at least one cryptographic unit. The cryptographic processor also includes a nonvolatile memory to store one or more microcode instructions, wherein at least one of the one or more microcode instructions is related to a sensitive operation. The cryptographic processor also includes a controller to control execution of the one or more microcode instructions by the at least one cryptographic unit, wherein the controller is to preclude execution of the sensitive operation if the apparatus is within an untrusted state.
    Type: Application
    Filed: March 31, 2004
    Publication date: June 16, 2005
    Inventors: Moinul Khan, David Wheeler, John Brizek, Anitha Kona, Mark Fullerton
  • Publication number: 20050132226
    Abstract: In an embodiment, an apparatus includes one or more cryptographic units. The apparatus also includes a memory to store one or more data encryption keys and an associated header for the one or more data encryption keys. The associated header defines which of the one or more cryptographic units are to use the data encryption key.
    Type: Application
    Filed: March 31, 2004
    Publication date: June 16, 2005
    Inventors: David Wheeler, John Brizek, Moinul Khan, Anitha Kona