Patents by Inventor Anjana Priya Sistla

Anjana Priya Sistla has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Memory pool allocation for a multi-core system
    Patent number: 11461139
    Abstract: An apparatus includes processing cores, memory blocks, a connection between each of processing core and memory block, chip selection circuit, and chip selection circuit busses between the chip selection circuit and each of the memory blocks. Each memory block includes a data port and a memory check port. The chip selection circuit is configured to enable writing data from a highest priority core through respective data ports of the memory blocks. The chip selection circuit is further configured to enable writing data from other cores through respective memory check ports of the memory blocks.
    Type: Grant
    Filed: April 8, 2020
    Date of Patent: October 4, 2022
    Assignee: Microchip Technology Incorporated
    Inventors: Michael Simmons, Anjana Priya Sistla, Priyank Gupta
  • Memory Pool Allocation for a Multi-Core System
    Publication number: 20200233714
    Abstract: An apparatus includes processing cores, memory blocks, a connection between each of processing core and memory block, chip selection circuit, and chip selection circuit busses between the chip selection circuit and each of the memory blocks. Each memory block includes a data port and a memory check port. The chip selection circuit is configured to enable writing data from a highest priority core through respective data ports of the memory blocks. The chip selection circuit is further configured to enable writing data from other cores through respective memory check ports of the memory blocks.
    Type: Application
    Filed: April 8, 2020
    Publication date: July 23, 2020
    Applicant: Microchip Technology Incorporated
    Inventors: Michael Simmons, Anjana Priya Sistla, Priyank Gupta
  • Memory pool allocation for a multi-core system
    Patent number: 10635494
    Abstract: An apparatus includes processing cores, memory blocks, a connection between each of processing core and memory block, chip selection circuit, and chip selection circuit busses between the chip selection circuit and each of the memory blocks. Each memory block includes a data port and a memory check port. The chip selection circuit is configured to enable writing data from a highest priority core through respective data ports of the memory blocks. The chip selection circuit is further configured to enable writing data from other cores through respective memory check ports of the memory blocks.
    Type: Grant
    Filed: May 8, 2018
    Date of Patent: April 28, 2020
    Assignee: MICROCHIP TECHNOLOGY INCORPORATED
    Inventors: Michael Simmons, Anjana Priya Sistla, Priyank Gupta
  • Memory Pool Allocation for a Multi-Core System
    Publication number: 20190347133
    Abstract: An apparatus includes processing cores, memory blocks, a connection between each of processing core and memory block, chip selection circuit, and chip selection circuit busses between the chip selection circuit and each of the memory blocks. Each memory block includes a data port and a memory check port. The chip selection circuit is configured to enable writing data from a highest priority core through respective data ports of the memory blocks. The chip selection circuit is further configured to enable writing data from other cores through respective memory check ports of the memory blocks.
    Type: Application
    Filed: May 8, 2018
    Publication date: November 14, 2019
    Applicant: Microchip Technology Incorporated
    Inventors: Michael Simmons, Anjana Priya Sistla, Priyank Gupta