Abstract: A semiconductor device may include a plurality of single-photon avalanche diode (SPAD) pixels. The semiconductor device may be a backside device having a substrate at the backside, dielectric layers on the substrate, metal layers interleaved with the dielectric layers, and a through silicon via (TSV) formed in the backside through the substrate and the dielectric layers. TSV seal rings may be formed around the TSV to protect the semiconductor device from moisture and/or water ingress. The TSV seal rings may be coupled to a high-voltage cathode bond pad and be coupled to offset portions of one of the metal layers to reduce leakage and/or parasitic effects due to the voltage difference between the cathode and the substrate. The TSV seal rings may also be merged with die seal rings at the edge of the substrate.

Abstract: An imaging device may include single-photon avalanche diodes (SPADs). To improve the sensitivity and signal-to-noise ratio of the SPADs, light scattering structures may be formed in the semiconductor substrate to increase the path length of incident light through the semiconductor substrate. To mitigate crosstalk, multiple rings of isolation structures may be formed around the SPAD. An outer deep trench isolation structure may include a metal filler such as tungsten and may be configured to absorb light. The outer deep trench isolation structure therefore prevents crosstalk between adjacent SPADs. Additionally, one or more inner deep trench isolation structures may be included. The inner deep trench isolation structures may include a low-index filler to reflect light and keep incident light in the active area of the SPAD.

Abstract: An imaging device may include single-photon avalanche diodes (SPADs). To improve the sensitivity and signal-to-noise ratio of the SPADs, light scattering structures may be formed in the semiconductor substrate to increase the path length of incident light through the semiconductor substrate. To mitigate crosstalk, multiple rings of isolation structures may be formed around the SPAD. An outer deep trench isolation structure may include a metal filler such as tungsten and may be configured to absorb light. The outer deep trench isolation structure therefore prevents crosstalk between adjacent SPADs. Additionally, one or more inner deep trench isolation structures may be included. The inner deep trench isolation structures may include a low-index filler to reflect light and keep incident light in the active area of the SPAD.

Abstract: An imaging device may include single-photon avalanche diodes (SPADs). To improve the sensitivity and signal-to-noise ratio of the SPADs, light scattering structures may be formed in the semiconductor substrate to increase the path length of incident light through the semiconductor substrate. To mitigate crosstalk, multiple rings of isolation structures may be formed around the SPAD. An outer deep trench isolation structure may include a metal filler such as tungsten and may be configured to absorb light. The outer deep trench isolation structure therefore prevents crosstalk between adjacent SPADs. Additionally, one or more inner deep trench isolation structures may be included. The inner deep trench isolation structures may include a low-index filler to reflect light and keep incident light in the active area of the SPAD.

Abstract: An apparatus includes an electrostatic discharge (ESD) protection device configured to protect a circuit from ESD conditions. The protection device includes an emitter region having a first diffusion polarity; a collector region laterally spaced apart from the emitter region, and having the first diffusion polarity; and a barrier region interposed laterally between the emitter region and the collector region while contacting the emitter region. The barrier region has a second diffusion polarity opposite from the first diffusion polarity. The device can further include a base region having the second diffusion polarity, and laterally surrounding and underlying the emitter region and the barrier region. The barrier region can have a higher dopant concentration than the base region, and block a lateral current flow between the collector and emitter regions, thus forming a vertical ESD device having enhanced ESD performance.

Abstract: An apparatus includes an electrostatic discharge (ESD) protection device configured to protect a circuit from ESD conditions. The protection device includes an emitter region having a first diffusion polarity; a collector region laterally spaced apart from the emitter region, and having the first diffusion polarity; and a barrier region interposed laterally between the emitter region and the collector region while contacting the emitter region. The barrier region has a second diffusion polarity opposite from the first diffusion polarity. The device can further include a base region having the second diffusion polarity, and laterally surrounding and underlying the emitter region and the barrier region. The barrier region can have a higher dopant concentration than the base region, and block a lateral current flow between the collector and emitter regions, thus forming a vertical ESD device having enhanced ESD performance.

Abstract: A method of shielding light from rows and columns of an array of pixels of a CMOS image sensor includes the steps of: providing a first layer of metal shielding above the rows and columns of the array; and providing a second layer of metal shielding above the first layer. The method further includes forming slots within each of the first and second layers of metal shielding, such that the slots of the first layer are misaligned with the slots of the second layer. A light shield for shielding columns and rows of an array of pixels in a CMOS image sensor includes a first metal layer located above the columns and rows of the array, and a second metal layer located above the first metal layer. Each of the first and second metal layers includes slots. The slots are formed such that the slots of the first layer are misaligned with the slots of the second layer.