Abstract: A horizontal phase detection circuit and system detects the phase of the horizontal synchronization pulse for a horizontal synchronization phase lock loop using positive and negative fractional error compensation. The positive and negative fractional errors are determined to get a more accurate detection of where a horizontal synchronization pulse crosses a synchronization signal slice level. Using both positive and negative fractional compensation, the circuit and method detects the horizontal synchronization pulse width and center of the pulse. In addition, if desired, an adaptive slice level generator generates a variable slice level threshold based on a signal strength of the input video signal to facilitate improved detection in the cases where the video information is weak even after gain control has been applied.