Patents by Inventor Anthony D. Amicangioli

Anthony D. Amicangioli has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240007404
    Abstract: A distributed computing system, such as may be used to implement an electronic trading system, controls inbound message flow rates. Limiting a per-client or per-connection inbound message rate also helps ensure fair provisioning of computing resources, so that a single client's excessive use of resources cannot overwhelm the system to such an extent that it prevents other clients from interacting with the distributed system. It is also desirable to have system-wide control of the overall inbound message rate across all client connections. Such system-wide control ensures that the distributed system as a whole can maintain the required levels of service, including offering a predictable level of access for all clients.
    Type: Application
    Filed: August 5, 2021
    Publication date: January 4, 2024
    Inventors: Anthony D. Amicangioli, Allen Bast, B. Joshua Rosen
  • Publication number: 20230396559
    Abstract: A distributed computing system, such as may be used to implement an electronic trading system, supports a notion of fairness in latency. The system does not favor any particular client. Thus, being connected to a particular access point into the system (such as via a gateway) does not give any particular device an unfair advantage or disadvantage over another. That end is accomplished by precisely controlling latency, that is, the time between when request messages arrive at the system and a time at which corresponding response messages are permitted to leave. The precisely controlled, deterministic latency can be fixed over time, or it can vary according to some predetermined pattern, or vary randomly within a pre-determined range of values.
    Type: Application
    Filed: June 8, 2023
    Publication date: December 7, 2023
    Inventors: Anthony D. Amicangioli, Allen Bast, B. Joshua Rosen, Christophe Juhasz
  • Publication number: 20230316399
    Abstract: An electronic trading system and corresponding method are based on a point-to-point mesh architecture. The electronic trading system comprises a gateway, core compute node, and sequencer. The core compute node performs an electronic trading matching function. The gateway transmits a message to the core compute node via a first direct connection. The gateway transmits the message via a second direct connection to the sequencer which, in turn, transmits a sequence-marked message to the core compute node via a third direct connection. The core compute node determines relative ordering of the message among other messages in the electronic trading system based on the sequence-marked message to complete the electronic trading matching function, deterministically.
    Type: Application
    Filed: August 5, 2021
    Publication date: October 5, 2023
    Inventors: Anthony D. Amicangioli, Allen Bast, B. Joshua Rosen, Christophe Juhasz
  • Publication number: 20230308213
    Abstract: Systems and methods are disclosed herein that provide low latency data communication with improved physical link layer reliability through repeated physical layer retransmission of data over a data connection whenever the connection is idle (i.e., no new data to send). In some embodiments, the transmission of administrative control symbols (e.g. “idles,” “commas”, etc.) can be suppressed or otherwise reduced to allow some of the available connection bandwidth to be used for data redundancy and fault tolerance through the repeated retransmission of data as described in more detail below. Accordingly, instead of executing time-consuming error correcting routines, a receive node can discard the erroneous data frame and process at least one repeat frame that carries the same data payload. Sequence numbers and/or other repeat indicators can be used to distinguish original frames from repeat frames and/or for identifying which frames carry the same data payload.
    Type: Application
    Filed: August 5, 2021
    Publication date: September 28, 2023
    Inventors: Anthony D. AMICANGIOLI, B. Joshua ROSEN
  • Publication number: 20230299864
    Abstract: Systems and methods for clock synchronization are disclosed in which a primary node generates special physical laver clock sync symbols from the output of a reference clock and inserts the clock sync symbols within a symbol stream to one or more secondary nodes. Upon receiving a symbol stream, a secondary node can extract the clock sync symbols from the stream to synchronize its local clock with the reference clock of the primary node. In particular, the clock sync symbols can be inserted into the symbol stream at any arbitrary symbol location, e.g., even between consecutive symbols of a symbol encoded data frame. The clock sync symbols can also replace some control symbols in the symbol stream, such as idle or comma symbols. Accordingly, the clock sync symbols can be inserted into a symbol stream at fixed intervals, irregular intervals, or at any arbitrary time for high resolution clock synchronization.
    Type: Application
    Filed: August 5, 2021
    Publication date: September 21, 2023
    Inventors: Anthony D. AMICANGIOLI, Allen BAST, B. Joshua ROSEN
  • Publication number: 20230269113
    Abstract: A distributed system includes a plurality of compute nodes configured to process messages. The compute nodes each process messages corresponding an assigned value of a common parameter of the messages. The values are assigned to the compute nodes such that two or more compute nodes are available to process each message. The values can be assigned to the compute nodes in a grouping configuration or a striping configuration. The compute nodes also circulate one or more tokens among nodes, and perform a self-maintenance operation during a given state of possession of the token. During a self-maintenance operation, the values assigned to the compute node can be reassigned to other compute nodes to ensure processing of corresponding messages.
    Type: Application
    Filed: April 28, 2023
    Publication date: August 24, 2023
    Inventors: Anthony D. Amicangioli, Christophe Juhasz, Allen Bast
  • Patent number: 11729107
    Abstract: A distributed computing system, such as may be used to implement an electronic trading system, supports a notion of fairness in latency. The system does not favor any particular client. Thus, being connected to a particular access point into the system (such as via a gateway) does not give any particular device an unfair advantage or disadvantage over another. That end is accomplished by precisely controlling latency, that is, the time between when request messages arrive at the system and a time at which corresponding response messages are permitted to leave. The precisely controlled, deterministic latency can be fixed over time, or it can vary according to some predetermined pattern, or vary randomly within a pre-determined range of values.
    Type: Grant
    Filed: June 18, 2021
    Date of Patent: August 15, 2023
    Assignee: HYANNIS PORT RESEARCH, INC.
    Inventors: Anthony D. Amicangioli, Allen Bast, B. Joshua Rosen, Christophe Juhasz
  • Patent number: 11683199
    Abstract: A distributed system includes a plurality of compute nodes configured to process messages. The compute nodes each process messages corresponding an assigned value of a common parameter of the messages. The values are assigned to the compute nodes such that two or more compute nodes are available to process each message. The values can be assigned to the compute nodes in a grouping configuration or a striping configuration. The compute nodes also circulate one or more tokens among nodes, and perform a self-maintenance operation during a given state of possession of the token. During a self-maintenance operation, the values assigned to the compute node can be reassigned to other compute nodes to ensure processing of corresponding messages.
    Type: Grant
    Filed: August 7, 2020
    Date of Patent: June 20, 2023
    Assignee: Hyannis Port Research, Inc.
    Inventors: Anthony D. Amicangioli, Allen Bast, Christophe Juhasz
  • Patent number: 11539819
    Abstract: Techniques for content inspection in a communication network, including detecting a packet in transit between a first and second endpoint, determining that content of the packet fails a content check, modifying a payload containing the content, adjusting a sequence number to account for the modification, and injecting a response message into a corresponding stream in an opposite direction. The response message may contain information relating to a reason for the rejection.
    Type: Grant
    Filed: September 30, 2020
    Date of Patent: December 27, 2022
    Assignee: Hyannis Port Research, Inc.
    Inventors: Anthony D. Amicangioli, Andrew C. Carp, Timothy G. Field, Dominick S. Grochowina, Yura Pyatnychko, Bernard J. Rosen
  • Patent number: 11483087
    Abstract: Systems and methods for clock synchronization are disclosed in which a primary node generates special physical layer clock sync symbols from the output of a reference clock and inserts the clock sync symbols within a symbol stream to one or more secondary nodes. Upon receiving a symbol stream, a secondary node can extract the clock sync symbols from the stream to synchronize its local clock with the reference clock of the primary node. In particular, the clock sync symbols can be inserted into the symbol stream at any arbitrary symbol location, e.g., even between consecutive symbols of a symbol encoded data frame. The clock sync symbols can also replace some control symbols in the symbol stream, such as idle or comma symbols. Accordingly, the clock sync symbols can be inserted into a symbol stream at fixed intervals, irregular intervals, or at any arbitrary time for high resolution clock synchronization.
    Type: Grant
    Filed: August 7, 2020
    Date of Patent: October 25, 2022
    Assignee: Hyannis Port Research, Inc.
    Inventors: Anthony D. Amicangioli, Allen Bast, B. Joshua Rosen
  • Patent number: 11328357
    Abstract: A distributed system for processing messages includes one or more gateways, sequencers, and compute nodes. The gateway sends a message to the sequencer and the compute node for processing. The sequencer associates the message with an identifier indicating a relative sequence of the message among a plurality of messages. The compute node processes the message to generate a preliminary result, and determines, based on the identifier, whether the compute node processed the message in sequence or out of sequence relative to another message of a plurality of messages. If the compute node determines that the message was received out of sequence, the compute node may process a sequence of messages including the message and at least one preceding message in an appropriate sequence.
    Type: Grant
    Filed: August 7, 2020
    Date of Patent: May 10, 2022
    Assignee: HYANNIS PORT RESEARCH, INC.
    Inventors: Anthony D. Amicangioli, Allen Bast
  • Patent number: 11315183
    Abstract: An electronic trading system and corresponding method are based on a point-to-point mesh architecture. The electronic trading system comprises a gateway, core compute node, and sequencer. The core compute node performs an electronic trading matching function. The gateway transmits a message to the core compute node via a first direct connection. The gateway transmits the message via a second direct connection to the sequencer which, in turn, transmits a sequence-marked message to the core compute node via a third direct connection. The core compute node determines relative ordering of the message among other messages in the electronic trading system based on the sequence-marked message to complete the electronic trading matching function, deterministically.
    Type: Grant
    Filed: August 7, 2020
    Date of Patent: April 26, 2022
    Assignee: Hyannis Port Research, Inc.
    Inventors: Anthony D. Amicangioli, Allen Bast, B. Joshua Rosen, Christophe Juhasz
  • Patent number: 11303389
    Abstract: Systems and methods are disclosed herein that provide low latency data communication with improved physical link layer reliability through repeated physical layer retransmission of data over a data connection whenever the connection is idle (i.e., no new data to send). In some embodiments, the transmission of administrative control symbols (e.g., “idles,” “commas”, etc.) can be suppressed or otherwise reduced to allow some of the available connection bandwidth to be used for data redundancy and fault tolerance through the repeated retransmission of data as described in more detail below. Accordingly, instead of executing time-consuming, error correcting routines, a receive node can discard the erroneous data frame and process at least one repeat frame that carries the same data payload. Sequence numbers and/or other repeat indicators can be used to distinguish original frames from repeat frames and/or for identifying which frames carry the same data payload.
    Type: Grant
    Filed: August 7, 2020
    Date of Patent: April 12, 2022
    Assignee: Hyannis Port Research, Inc.
    Inventors: Anthony D. Amicangioli, B. Joshua Rosen
  • Publication number: 20220045955
    Abstract: A distributed computing system, such as may be used to implement an electronic trading system, controls inbound message flow rates. Limiting a per-client or per-connection inbound message rate also helps ensure fair provisioning of computing resources, so that a single client's excessive use of resources cannot overwhelm the system to such an extent that it prevents other clients from interacting with the distributed system. It is also desirable to have system-wide control of the overall inbound message rate across all client connections. Such system-wide control ensures that the distributed system as a whole can maintain the required levels of service, including offering a predictable level of access for all clients.
    Type: Application
    Filed: August 7, 2020
    Publication date: February 10, 2022
    Inventors: Anthony D. Amicangioli, Allen Bast, B. Joshua Rosen
  • Publication number: 20220045964
    Abstract: A distributed computing system, such as may be used to implement an electronic trading system, supports a notion of fairness in latency. The system does not favor any particular client. Thus, being connected to a particular access point into the system (such as via a gateway) does not give any particular device an unfair advantage or disadvantage over another. That end is accomplished by precisely controlling latency, that is, the time between when request messages arrive at the system and a time at which corresponding response messages are permitted to leave. The precisely controlled, deterministic latency can be fixed over time, or it can vary according to some predetermined pattern, or vary randomly within a pre-determined range of values.
    Type: Application
    Filed: June 18, 2021
    Publication date: February 10, 2022
    Inventors: Anthony D. Amicangioli, Allen Bast, B. Joshua Rosen, Christophe Juhasz
  • Publication number: 20220045777
    Abstract: Systems and methods for clock synchronization are disclosed in which a primary node generates special physical layer clock sync symbols from the output of a reference clock and inserts the clock sync symbols within a symbol stream to one or more secondary nodes. Upon receiving a symbol stream, a secondary node can extract the clock sync symbols from the stream to synchronize its local clock with the reference clock of the primary node. In particular, the clock sync symbols can be inserted into the symbol stream at any arbitrary symbol location, e.g., even between consecutive symbols of a symbol encoded data frame. The clock sync symbols can also replace some control symbols in the symbol stream, such as idle or comma symbols. Accordingly, the clock sync symbols can be inserted into a symbol stream at fixed intervals, irregular intervals, or at any arbitrary time for high resolution clock synchronization.
    Type: Application
    Filed: August 7, 2020
    Publication date: February 10, 2022
    Inventors: Anthony D. Amicangioli, Allen Bast, B. Joshua Rosen
  • Publication number: 20220045878
    Abstract: A distributed system includes a plurality of compute nodes configured to process messages. The compute nodes each process messages corresponding an assigned value of a common parameter of the messages. The values are assigned to the compute nodes such that two or more compute nodes are available to process each message. The values can be assigned to the compute nodes in a grouping configuration or a striping configuration. The compute nodes also circulate one or more tokens among nodes, and perform a self-maintenance operation during a given state of possession of the token. During a self-maintenance operation, the values assigned to the compute node can be reassigned to other compute nodes to ensure processing of corresponding messages.
    Type: Application
    Filed: August 7, 2020
    Publication date: February 10, 2022
    Inventors: Anthony D. Amicangioli, Allen Bast, Christophe Juhasz
  • Publication number: 20220044318
    Abstract: A distributed system for processing messages includes one or more gateways, sequencers, and compute nodes. The gateway sends a message to the sequencer and the compute node for processing. The sequencer associates the message with an identifier indicating a relative sequence of the message among a plurality of messages. The compute node processes the message to generate a preliminary result, and determines, based on the identifier, whether the compute node processed the message in sequence or out of sequence relative to another message of a plurality of messages. If the compute node determines that the message was received out of sequence, the compute node may process a sequence of messages including the message and at least one preceding message in an appropriate sequence.
    Type: Application
    Filed: August 7, 2020
    Publication date: February 10, 2022
    Inventors: Anthony D. Amicangioli, Allen Bast
  • Publication number: 20220045790
    Abstract: Systems and methods are disclosed herein that provide low latency data communication with improved physical link layer reliability through repeated physical layer retransmission of data over a data connection whenever the connection is idle (i.e., no new data to send). In some embodiments, the transmission of administrative control symbols (e.g., “idles,” “commas”, etc.) can be suppressed or otherwise reduced to allow some of the available connection bandwidth to be used for data redundancy and fault tolerance through the repeated retransmission of data as described in more detail below. Accordingly, instead of executing time-consuming, error correcting routines, a receive node can discard the erroneous data frame and process at least one repeat frame that carries the same data payload. Sequence numbers and/or other repeat indicators can be used to distinguish original frames from repeat frames and/or for identifying which frames carry the same data payload.
    Type: Application
    Filed: August 7, 2020
    Publication date: February 10, 2022
    Inventors: Anthony D. Amicangioli, B. Joshua Rosen
  • Publication number: 20220044319
    Abstract: An electronic trading system and corresponding method are based on a point-to-point mesh architecture. The electronic trading system comprises a gateway, core compute node, and sequencer. The core compute node performs an electronic trading matching function. The gateway transmits a message to the core compute node via a first direct connection. The gateway transmits the message via a second direct connection to the sequencer which, in turn, transmits a sequence-marked message to the core compute node via a third direct connection. The core compute node determines relative ordering of the message among other messages in the electronic trading system based on the sequence-marked message to complete the electronic trading matching function, deterministically.
    Type: Application
    Filed: August 7, 2020
    Publication date: February 10, 2022
    Inventors: Anthony D. Amicangioli, Allen Bast, B. Joshua Rosen, Christophe Juhasz