Abstract: A frequency converter comprising a frequency transposition block for samples (11Q_1, 11Q_2), a filtering block (12Q_1, 12Q_2), the filtered samples y(n) verifying y(n)=c(0)·x(n)+c(1)·x(n?1)+c(2)·x(n?2)+ . . . +c(p?1)·x(n?p+1)+c(p)·x(n?p)+c(p?1)·x(n?p?1)+ . . . + . . . +c(1)·x(n?2·p+1)+c(0)·x(n?2·p), wherein x( ) are the transposed samples and c(0), . . . c(p) are the real coefficients of the filter; and being adapted for, during a cycle for determining the value of the filtered sample y(n): calculating the first terms c(0)·x(n), c(1)·x(n?1), c(2)·x(n?2), . . . , c(p)·x(n?p) by multiplying the respective coefficients and transposed samples, and storing in memory said first calculated terms; reading the second terms c(p?1)·x(n?p?1), . . . , c(1)·x(n?2·p+1), c(0)·x(n?2·p), calculated and stored in memory during previous cycles for determining the value of filtered samples y(n?m); and determining y(n) by summation of the first and second terms.

Abstract: A frequency converter comprising a frequency transposition block for samples (11Q_1, 11Q_2), a filtering block (12Q_1, 12Q_2), the filtered samples y(n) verifying y(n)=c(0)·x(n)+c(1)·x(n?1)+c(2)·x(n?2)+ . . . +c(p?1)·x(n?p+1)+c(p)·x(n?p)+c(p?1)·x(n?p?1)+ . . . + . . . +c(1)·x(n?2·p+1)+c(0)·x(n?2·p), wherein x( ) are the transposed samples and c(0), . . . c(p) are the real coefficients of the filter; and being adapted for, during a cycle for determining the value of the filtered sample y(n): calculating the first terms c(0)·x(n), c(1)·x(n?1), c(2)·x(n?2), . . . , c(p)·x(n?p) by multiplying the respective coefficients and transposed samples, and storing in memory said first calculated terms; reading the second terms c(p?1)·x(n?p?1), . . . , c(1)·x(n?2·p+1), c(0)·x(n?2·p), calculated and stored in memory during previous cycles for determining the value of filtered samples y(n?m); and determining y(n) by summation of the first and second terms.

Abstract: A device to secure a JTAG type bus in its “scan chain” component chaining mode functionality, when several components are connected in series on the JTAG bus, includes a first interface for receiving JTAG signals and a second interface for the JTAG signals originating from a chain of components. The device includes the following modules: a JTAG frame generator module for verifying the continuity of operation of said Bus and components; a module for monitoring the electrical activity of said Bus and components; an alarm module for sending back an alarm detected by the above modules; an alarm module for managing the operating mode of the device; and a security functions activation module AFS.