Abstract: A process for producing a cobalt silicide T-gate on a silicon substrate (10) in which a silicon oxide gate layer (12) is formed in the silicon substrate (10). The silicon oxide gate layer (12) is covered with a polysilicon layer (14) and a masking oxide layer (16). An opening (18) is formed in the masking oxide layer (16) through to the polysilicon layer (14) which defines a gate region (22) for the device being fabricated (16). A cobalt layer (20) is deposited on the masking oxide layer (16) and the surface of the polysilicon layer (14) in the gate region (22). The substrate (10) is then heated to react the cobalt layer (20) with the polysilicon layer (14) to form a cobalt silicide layer (24) in the gate region (22). The unreacted portion of the cobalt layer (20) and masking oxide layer (16) are removed and the polysilicon layer (14) etched using the cobalt silicide layer (24) as a mask.

Abstract: Means for compensating for threshold voltage shifts of Metal Oxide Semiconductor Field Effect Transistors (MOS FETs) of a Large Scale Integrated Circuit device (LSI), where the threshold voltage shifts are induced by radiation dosage. The FETs are formed in a relatively thin layer of silicon on an insulator film supported by a substrate. The compensating means includes a pair of sensor FETs formed integrally with the LSI device, an operational amplifier and a back gate formed opposite the channel regions of the FETs of the LSI device. The sensor FETs develop an output voltage that is applied as one input to the operational amplifier. A reference voltage, equal to the sensor output voltage prior to exposure to radiation, is applied as a second input to the operational amplifier. The amplifier output is applied to the back gate. The sensor output voltage changes as a result of radiation dosage.

Abstract: A method for making a lateral bipolar transistor using SOI technology. A base mask is formed on the surface of a silicon island and its sidewalls coated with a layer of silicon dioxide. After local oxidization of the silicon island, emitter and collector regions are implanted using the base mask and the silicon dioxide deposited on the sidewalls of the base mask as a mask. The base mask is then removed and a shallow base contact region is implanted in the base region previously shielded by the base mask. The remaining silicon dioxide deposited on the sidewalls of the base mask form vertical spacers which are used as a self-aligned mask for forming silicide contacts on the emitter, collector and base contact regions. These remaining silicon dioxide vertical spacers physically separate emitter-base and base collector junctions from the highly doped base contact area and electrically isolate the silicide contacts.