Abstract: A network device such as a router or switch, in one embodiment, includes a timing analyzer which is capable of providing timing analysis over one or more network circuits. The timing analyzer, in one aspect, receives a data packet traveling across a circuit emulation service (“CES”) circuit such as T1 or E1 circuit. Upon obtaining an arrival timestamp associated with the data packet, the arrival timestamp is stored in a timestamp buffer in accordance with a first-in first-out (“FIFO”) storage sequence. After identifying the oldest arrival timestamp in the timestamp buffer, an offset is generated based on the result of comparison between the arrival timestamp and the oldest timestamp. The timing analyzer can also be configured to generate timing reports on-demand based on generated offset(s).

Abstract: A method includes storing a value of shared variables from a first active packet-to-tdm interface. The value of the shared variables is provided to a successor active packet-to-tdm interface.

Abstract: A method includes storing a value of shared variables from an active member of a plurality of packet-to-tdm interfaces. Another member of the plurality of packet-to-tdm interfaces is selected to become active. The value of shared variables is provided to the selected member.