Abstract: The present disclosure relates to systems, non-transitory computer-readable media, and methods for applying controllable current to portions of an electrodeposition device via a series-in-parallel-out rectifier circuit. In particular, the rectifier circuit includes a front-end stage that includes an alternating current-to-direct current converter circuit to generate one or more direct current signals from an alternating current signal of an input terminal. Additionally, the rectifier circuit includes a back-end stage including a plurality of direct current-to-direct current converter circuits that convert the one or more direct current signals into a plurality of child direct current signals. Furthermore, the plurality of direct current-to-direct current converter circuits of the disclosed series-in-parallel-out rectifier circuit are in physical contact with an anode of the electrodeposition device at a plurality of different positions to apply separate currents to different portions of the anode.

Abstract: The present disclosure relates to systems, non-transitory computer-readable media, and methods for applying controllable current to portions of an electrodeposition device via a series-in-parallel-out rectifier circuit. In particular, the rectifier circuit includes a front-end stage that includes an alternating current-to-direct current converter circuit to generate one or more direct current signals from an alternating current signal of an input terminal. Additionally, the rectifier circuit includes a back-end stage including a plurality of direct current-to-direct current converter circuits that convert the one or more direct current signals into a plurality of child direct current signals. Furthermore, the plurality of direct current-to-direct current converter circuits of the disclosed series-in-parallel-out rectifier circuit are in physical contact with an anode of the electrodeposition device at a plurality of different positions to apply separate currents to different portions of the anode.

Abstract: The present disclosure relates to systems, non-transitory computer-readable media, and methods for applying controllable current to portions of an electrodeposition device via a series-in-parallel-out rectifier circuit. In particular, the rectifier circuit includes a front-end stage that includes an alternating current-to-direct current converter circuit to generate one or more direct current signals from an alternating current signal of an input terminal. Additionally, the rectifier circuit includes a back-end stage including a plurality of direct current-to-direct current converter circuits that convert the one or more direct current signals into a plurality of child direct current signals. Furthermore, the plurality of direct current-to-direct current converter circuits of the disclosed series-in-parallel-out rectifier circuit are in physical contact with an anode of the electrodeposition device at a plurality of different positions to apply separate currents to different portions of the anode.

Abstract: A transformer arrangement comprises a primary winding and a secondary winding, which are magnetically coupled. The transformer arrangement also comprises a compensating arrangement, which is circuited to provide a link between a terminal of the primary winding and a terminal of the secondary winding. The compensating arrangement is configured such that a change of a magnetic flux through the primary winding and the secondary winding induces a voltage in the compensating arrangement. The compensating arrangement comprises at least one coupling capacitor configured to block a DC current and to pass a current caused by the induced voltage. The compensating arrangement is configured to at least partially compensate a current that is caused by an inter-winding capacitance between the primary winding and the secondary winding using the current caused by the induced voltage.

Abstract: Embodiments according to the disclosure comprise a control device for controlling an ATE for testing a DUT which is electrically coupled to the ATE using, or for example via, a device under test (DUT) contacting structure, e.g. using or via a probe needle, or for example using or via a DUT socket. The control device is configured to figure out a temperature of the DUT contacting structure using a thermal model, e.g. using a thermal model of the DUT contacting structure or using, for example, a thermal model comprising a thermal model of the DUT contacting structure. In addition, the control device is configured to influence, e.g. to control, to regulate, to deactivate and/or to limit, a signal applied to the DUT contacting structure based on the figured out, or for example modeled, temperature. The figured out temperature comprises at least one of a determined temperature or an estimated temperature.

Abstract: A multiple output isolated power supply for the usage as a floating V/I source in an automated test equipment. The multiple output isolated power supply includes a multi-layer printed circuit board. Furthermore the multiple output isolated power supply includes a planar transformer, which includes a plurality of secondary windings associated with different output channels, arranged on or in the multi-layer PCB. At least two output channels out of the output channels of the multiple output isolated power supply includes a rectifier and a voltage regulator or a current regulator.

Abstract: A power supply for providing an electric pulse to an electrical consumer is shown. The power supply has an input circuit, a storage capacitor, and an output circuit. The input circuit is configured to charge the storage capacitor up to a maximum voltage. The output circuit is configured to provide one or more pulses having a pulse voltage on the basis of a charge stored in the storage capacitor and to compensate for a reduction of the voltage of the storage capacitor by at least 30% down from the maximum voltage. Moreover, the power supply is configured such that the voltage of the storage capacitor is reduced by at least 30% during the generation of one or more pulses.

Abstract: An amplifier includes an amplifying device and a bias circuit for providing a bias voltage for the amplifying device. The bias circuit is configured to provide the bias voltage in dependence of an output signal of an optical coupling arrangement which provides for electrical isolation.

Abstract: A multiple output isolated power supply for the usage as a floating V/I source in an automated test equipment. The multiple output isolated power supply includes a multi-layer printed circuit board. Furthermore the multiple output isolated power supply includes a planar transformer, which includes a plurality of secondary windings associated with different output channels, arranged on or in the multi-layer PCB. At least two output channels out of the output channels of the multiple output isolated power supply includes a rectifier and a voltage regulator or a current regulator.

Abstract: A transformer arrangement comprises a primary winding and a secondary winding, which are magnetically coupled. The transformer arrangement also comprises a compensating arrangement, which is circuited to provide a link between a terminal of the primary winding and a terminal of the secondary winding. The compensating arrangement is configured such that a change of a magnetic flux through the primary winding and the secondary winding induces a voltage in the compensating arrangement. The compensating arrangement comprises at least one coupling capacitor configured to block a DC current and to pass a current caused by the induced voltage. The compensating arrangement is configured to at least partially compensate a current that is caused by an inter-winding capacitance between the primary winding and the secondary winding using the current caused by the induced voltage.

Abstract: An amplifier includes an amplifying device and a bias circuit for providing a bias voltage for the amplifying device. The bias circuit is configured to provide the bias voltage in dependence of an output signal of an optical coupling arrangement which provides for electrical isolation.

Abstract: A power supply for providing an electric pulse to an electrical consumer is shown. The power supply has an input circuit, a storage capacitor, and an output circuit. The input circuit is configured to charge the storage capacitor up to a maximum voltage. The output circuit is configured to provide one or more pulses having a pulse voltage on the basis of a charge stored in the storage capacitor and to compensate for a reduction of the voltage of the storage capacitor by at least 30% down from the maximum voltage. Moreover, the power supply is configured such that the voltage of the storage capacitor is reduced by at least 30% during the generation of one or more pulses.

Abstract: An automatic test system for testing smart card chips. The system includes synchronization circuitry that allows response signals generated at random times after a stimulus to be synchronized with a pattern generator. The described system has multiple paths in the synchronization circuitry that allows responses from several devices under test to be synchronized with each other so that parallel testing is supported. The system is well adapted for testing of smart card chips because such chips often respond to stimulus at random times. Other adaptations are included for testing of smart card chips. These adaptations include circuitry to generate a modulated RF carrier signal and signal processing circuitry that can detect modulation imposed on the RF carrier, allowing the smart card chip to be tested without modifications to the device for test access.

Abstract: An automatic test system for testing smart card chips. The system includes synchronization circuitry that allows response signals generated at random times after a stimulus to be synchronized with a pattern generator. The described system has multiple paths in the synchronization circuitry that allows responses from several devices under test to be synchronized with each other so that parallel testing is supported. The system is well adapted for testing of smart card chips because such chips often respond to stimulus at random times. Other adaptations are included for testing of smart card chips. These adaptations include circuitry to generate a modulated RF carrier signal and signal processing circuitry that can detect modulation imposed on the RF carrier, allowing the smart card chip to be tested without modifications to the device for test access.

Abstract: An automatic test system for testing smart card chips. The system includes synchronization circuitry that allows response signals generated at random times after a stimulus to be synchronized with a pattern generator. The described system has multiple paths in the synchronization circuitry that allows responses from several devices under test to be synchronized with each other so that parallel testing is supported. The system is well adapted for testing of smart card chips because such chips often respond to stimulus at random times. Other adaptations are included for testing of smart card chips. These adaptations include circuitry to generate a modulated RF carrier signal and signal processing circuitry that can detect modulation imposed on the RF carrier, allowing the smart card chip to be tested without modifications to the device for test access.