Abstract: Implementations of the present disclosure include providing a graph representative of a network, a set of nodes representing respective assets, each edge representing one or more lateral paths between assets, the graph data including configurations affecting at least one impact that has an effect on an asset, determining multiple sets of fixes for configurations, each fix having a cost associated therewith, incorporating fix data of the sets of fixes into the graph, defining a set of fixes including one or more fixes from the multiple sets of fixes by defining an optimization problem that identifies one or more impacts that are to be nullified and executing resolving the optimization problem to define the set of fixes, each fix in the set of fixes being associated with a respective configuration in the graph, and scheduling performance of each fix in the set of fixes based on one or more operational constraints.

Abstract: Implementations are directed to receiving analytical attack graph (AAG) data representative of one or more AAGs, each AAG representing one or more lateral paths between configuration items within an enterprise network, calculating, for each configuration item in a set of configuration items, a process risk value for each impact in a set of impacts achievable within the configuration item, for a first impact, a first process risk value being calculated based on a multi-path formula in response to determining that multiple paths in the AAG lead to the first impact, and, for a second impact, a second process risk value being calculated based on a single-path formula in response to determining that a single path in the AAG leads to the second impact, and determining that at least one process risk value exceeds a threshold process risk value, and in response, adjusting one or more security controls within the enterprise network.

Abstract: Disclosed are techniques for saving power in a Universal Serial Bus (USB) repeater/re-timer between a USB host and a peripheral device by intercepting packets received from the host to predict the direction of data traffic to selectively turn off/on circuitry of a peripheral port used to receive packets from the peripheral device. If a host port determines that the host is sending a start-of-frame (SOF) packet, the direction of data flow is from the host to the peripheral device, and the repeater may turn off the peripheral port such as squelch circuitry. If the host port determines that the host is sending a non-SOF packet, such as an address token that precedes a host-to-peripheral-device data transfer or a peripheral-device-to-host data transfer, the direction of data flow is anticipated to be from the peripheral device to the host, and the repeater may re-enable the deactivated circuitry of the peripheral port.

Abstract: Systems and methods for measuring impact of online search queries on user actions. The method includes capturing clickstream data entered via a website, the clickstream data including text-based queries associated with web searches, and clustering the queries to generate query clusters. The method also includes assigning each query cluster to an intent such that each assigned intent estimates a desired action behind the queries in the corresponding query cluster. The method further includes mapping each intent assigned to a query cluster to at least one action motivated by the intent. The method also includes computing metrics using the mapping to quantitatively measure the impact of the queries on the mapped actions by tracking performance of the actions within a predefined time period after the queries.

Abstract: Disclosed are techniques for saving power in a Universal Serial Bus (USB) repeater/re-timer between a USB host and a peripheral device by intercepting packets received from the host to predict the direction of data traffic to selectively turn off/on circuitry of a peripheral port used to receive packets from the peripheral device. If a host port determines that the host is sending a start-of-frame (SOF) packet, the direction of data flow is from the host to the peripheral device, and the repeater may turn off the peripheral port such as squelch circuitry. If the host port determines that the host is sending a non-SOF packet, such as an address token that precedes a host-to-peripheral-device data transfer or a peripheral-device-to-host data transfer, the direction of data flow is anticipated to be from the peripheral device to the host, and the repeater may re-enable the deactivated circuitry of the peripheral port.

Abstract: Disclosed are techniques for saving power in a Universal Serial Bus (USB) repeater/re-timer between a USB host and a peripheral device by intercepting packets received from the host to predict the direction of data traffic to selectively turn off/on circuitry of a peripheral port used to receive packets from the peripheral device. If a host port determines that the host is sending a start-of-frame (SOF) packet, the direction of data flow is from the host to the peripheral device, and the repeater may turn off the peripheral port such as squelch circuitry. If the host port determines that the host is sending a non-SOF packet, such as an address token that precedes a host-to-peripheral-device data transfer or a peripheral-device-to-host data transfer, the direction of data flow is anticipated to be from the peripheral device to the host, and the repeater may re-enable the deactivated circuitry of the peripheral port.

Abstract: Disclosed are techniques for saving power in a Universal Serial Bus (USB) repeater/re-timer between a USB host and a peripheral device by intercepting packets received from the host to predict the direction of data traffic to selectively turn off/on circuitry of a peripheral port used to receive packets from the peripheral device. If a host port determines that the host is sending a start-of-frame (SOF) packet, the direction of data flow is from the host to the peripheral device, and the repeater may turn off the peripheral port such as squelch circuitry. If the host port determines that the host is sending a non-SOF packet, such as an address token that precedes a host-to-peripheral-device data transfer or a peripheral-device-to-host data transfer, the direction of data flow is anticipated to be from the peripheral device to the host, and the repeater may re-enable the deactivated circuitry of the peripheral port.

Abstract: A device includes a USB-C controller instantiated as a first integrated circuit that includes a first set of host terminals coupled to host controllers and a second set of terminals coupled to sets of D+/D? terminals of a type-C receptacle. A D+/D? multiplexer is to selectively couple the first set of host terminals to the second set of terminals. An electrostatic discharge (ESD) protection circuit is coupled between the D+/D? multiplexer and the second set of terminals. A charger detector circuit is coupled between a positive data system terminal and a negative data system terminal of the first set of terminals, the charger detector circuit to detect whether the second set of terminals is coupled to a USB charger through the type-C receptacle.

Abstract: A power supply architecture for USB Type-C controllers is described herein. In an example embodiment, an integrated circuit (IC) controller comprises a VCONN pin, a power rail coupled to internal circuits of the IC controller, and a VCONN switch coupled between the VCONN pin and the power rail. The VCONN switch comprises: a drain-extended n-type field effect transistor (DENFET) coupled between the VCONN pin and the power rail; a pump switch coupled to a gate of the DENFET; a resistor coupled between the VCONN pin and the gate of the DENFET; and a diode clamp coupled between the gate of the DENFET and ground.

Abstract: Implementations are directed to receiving analytical attack graph (AAG) data representative of one or more AAGs, each AAG representing one or more lateral paths between configuration items within an enterprise network, calculating, for each configuration item in a set of configuration items, a process risk value for each impact in a set of impacts achievable within the configuration item, for a first impact, a first process risk value being calculated based on a multi-path formula in response to determining that multiple paths in the AAG lead to the first impact, and, for a second impact, a second process risk value being calculated based on a single-path formula in response to determining that a single path in the AAG leads to the second impact, and determining that at least one process risk value exceeds a threshold process risk value, and in response, adjusting one or more security controls within the enterprise network.

Abstract: Implementations of the present disclosure include providing a graph representative of a network, a set of nodes representing respective assets, each edge representing one or more lateral paths between assets, the graph data including configurations affecting at least one impact that has an effect on an asset, determining multiple sets of fixes for configurations, each fix having a cost associated therewith, incorporating fix data of the sets of fixes into the graph, defining a set of fixes including one or more fixes from the multiple sets of fixes by defining an optimization problem that identifies one or more impacts that are to be nullified and executing resolving the optimization problem to define the set of fixes, each fix in the set of fixes being associated with a respective configuration in the graph, and scheduling performance of each fix in the set of fixes based on one or more operational constraints.

Abstract: Implementations of the present disclosure include providing a state graph representative of a set of action states within a network, each action state representing an attack that can be performed by an adversary within the network, determining a path stealthiness value for each attack path of a set of attack paths within the network, path stealthiness values being determined based on a mapping that maps each action state to one or more technique-tactic pairs and one or more security controls, determining a path hardness value for each attack path of the set of attack paths within the network, path hardness values being determined based on a state correlation matrix that correlates action states relative to each other, and a decay factor that represents a reduction in effort required to repeatedly perform an action of an action state, and selectively generating one or more alerts based on one or more of path stealthiness values and path hardness values.

Abstract: Implementations of the present disclosure include providing, by a security platform, graph data defining a graph that is representative of an enterprise network, the graph comprising nodes and edges between nodes, a set of nodes representing respective assets within the enterprise network, each edge representing at least a portion of one or more lateral movement paths between assets in the enterprise network, determining, for each asset, a criticality of the respective asset to operation of a process, determining a lateral movement path between a first node represented by a first asset and a second node represented by second asset within the graph, determining a path value representative of a criticality in preventing an attack through the lateral movement path, and providing an indication of the path value representative of the criticality in preventing an attack through the lateral movement path.

Abstract: Implementations of the present disclosure include providing a graph representative of a network, a set of nodes representing respective assets, each edge representing one or more lateral paths between assets, the graph data including configurations affecting at least one impact that has an effect on an asset, determining multiple sets of fixes for configurations, each fix having a cost associated therewith, incorporating fix data of the sets of fixes into the graph, defining a set of fixes including one or more fixes from the multiple sets of fixes by defining an optimization problem that identifies one or more impacts that are to be nullified and executing resolving the optimization problem to define the set of fixes, each fix in the set of fixes being associated with a respective configuration in the graph, and scheduling performance of each fix in the set of fixes based on one or more operational constraints.

Abstract: A system includes a transformer having an auxiliary coil to provide a flyback voltage to a primary side of an alternating current to direct current (AC-DC) converter. A primary side controller includes an auxiliary pin coupled to the transformer and to an external capacitor, the auxiliary pin to receive the flyback voltage after startup. a junction gate field-effect transistor (JFET) coupled to a supply voltage. A first FET is coupled in series between the JFET and the auxiliary pin, the JFET to charge the external capacitor from the supply voltage during startup. One or more depletion region diodes are coupled to a gate of the first FET, the one or more depletion region diodes to bias a voltage of the gate of the first FET to a specific voltage.

Abstract: Techniques for control of power switches in a USB Power Delivery (USB-PD) system are described herein. In an example embodiment, an integrated circuit comprises a programmable gate control circuit coupled to a provider field effect transistor (FET) and a consumer FET to provide control signals to the provider and consumer FETs in response to system conditions and application requirements of the USB-PD system. A pulldown current control circuit may provide additional control to slew rate for the slow turn-ON of provider and consumer FETs.

Abstract: A power supply architecture for USB Type-C controllers is described herein. In an example embodiment, an integrated circuit (IC) controller comprises a VCONN pin, a power rail coupled to internal circuits of the IC controller, and a VCONN switch coupled between the VCONN pin and the power rail. The VCONN switch comprises: a drain-extended n-type field effect transistor (DENFET) coupled between the VCONN pin and the power rail; a pump switch coupled to a gate of the DENFET; a resistor coupled between the VCONN pin and the gate of the DENFET; and a diode clamp coupled between the gate of the DENFET and ground.

Abstract: A system includes a transformer having an auxiliary coil to provide a flyback voltage to a primary side of an alternating current to direct current (AC-DC) converter. A primary side controller includes an auxiliary pin coupled to the transformer and to an external capacitor, the auxiliary pin to receive the flyback voltage after startup. a junction gate field-effect transistor (JFET) coupled to a supply voltage. A first FET is coupled in series between the JFET and the auxiliary pin, the JFET to charge the external capacitor from the supply voltage during startup. One or more depletion region diodes are coupled to a gate of the first FET, the one or more depletion region diodes to bias a voltage of the gate of the first FET to a specific voltage.

Abstract: A USB-C controller, disposed on an integrated circuit (IC), comprises a first pair of terminals to communicate with a first communication protocol that is other than USB, a second pair of terminals to communicate with a second communication protocol that is other than USB, and a third pair of terminals, each of which is to be coupled to a corresponding SBU1 terminal or SBU2 terminal of a Type-C receptacle. The USB-C controller further includes: a multiplexer to selectively couple the first pair of terminals to the third pair of terminals and the second pair of terminals to the third pair of terminals: and logic to control the multiplexer according to a mode enabled within a configuration channel (CC) signal.

Abstract: A device includes a USB-C controller instantiated as a first integrated circuit that includes a first set of host terminals coupled to host controllers and a second set of terminals coupled to sets of D+/D? terminals of a type-C receptacle. A D+/D? multiplexer is to selectively couple the first set of host terminals to the second set of terminals. An electrostatic discharge (ESD) protection circuit is coupled between the D+/D? multiplexer and the second set of terminals. A charger detector circuit is coupled between a positive data system terminal and a negative data system terminal of the first set of terminals, the charger detector circuit to detect whether the second set of terminals is coupled to a USB charger through the type-C receptacle.