Patents by Inventor Anupama A. Thaploo

Anupama A. Thaploo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Assist circuit for memory
    Patent number: 9355694
    Abstract: Embodiments include apparatuses, methods, and systems related to an assist circuit that may be coupled to one or more components of a memory system to selectively lower a supply voltage that is delivered to the component. For example, the assist circuit may be coupled to a plurality of bitcells (e.g., register file bitcells). The assist circuit may selectively lower the supply voltage delivered to the bitcells during at least a portion of a write operation and/or during an inactive state of the bitcells. Additionally, or alternatively, the assist circuit may be coupled to a read circuit to selectively lower the supply voltage delivered to the read circuit during an inactive state of the read circuit. The assist circuit may include a control transistor coupled in parallel with one or more diodes between a main supply rail and a supply node of the bitcells and/or read circuit.
    Type: Grant
    Filed: March 28, 2014
    Date of Patent: May 31, 2016
    Assignee: Intel Corporation
    Inventors: Jaydeep P. Kulkarni, Anupama Thaploo, Iqbal Rajwani, Kyung-Hoae Koo, Eric A. Karl, Muhammad Khellah
  • ASSIST CIRCUIT FOR MEMORY
    Publication number: 20150279438
    Abstract: Embodiments include apparatuses, methods, and systems related to an assist circuit that may be coupled to one or more components of a memory system to selectively lower a supply voltage that is delivered to the component. For example, the assist circuit may be coupled to a plurality of bitcells (e.g., register file bitcells). The assist circuit may selectively lower the supply voltage delivered to the bitcells during at least a portion of a write operation and/or during an inactive state of the bitcells. Additionally, or alternatively, the assist circuit may be coupled to a read circuit to selectively lower the supply voltage delivered to the read circuit during an inactive state of the read circuit. The assist circuit may include a control transistor coupled in parallel with one or more diodes between a main supply rail and a supply node of the bitcells and/or read circuit.
    Type: Application
    Filed: March 28, 2014
    Publication date: October 1, 2015
    Inventors: Jaydeep P. Kulkarni, Anupama Thaploo, Iqbal Rajwani, Kyung-Hoae Koo, Eric A. Karl, Muhammad Khellah