Abstract: Methods and apparatus provide for a conformable polishing head for uniformly polishing a workpiece. The polishing head includes an elastic polishing pad mounted on an elastic membrane that seals a cavity in the polishing head. The cavity is pressurized to expand the membrane and press the polishing pad down on the top surface of the workpiece, such that the polishing pad conforms to the surface and applies a substantially uniform pressure distribution across the workpiece and thereby uniformly removes material across high and low spots on the workpiece.

Abstract: A multi-station polish system and process for polishing thin, flat (planar) and rigid workpieces. Workpieces are conveyed through multiple polishing stations that include a bulk material removal belt polishing station and finishing rotary polishing station. The bulk of the material is relatively quickly removed at the bulk removal station using a conformable abrasive belt and the workpiece surface is then polished to the desired finish at the finishing station using a conformable annular rotary polishing pad.

Abstract: A video encoder receives a minimum number of bits (MIN) and a maximum number of bits (MAX) to be used to encode a segment of a sequence of image frames, the segment including a set of pictures contained in the sequence of image frames. The video encoder encodes the set of pictures using a total number of bits greater than the minimum number of bits (MIN), and not exceeding the maximum number of bits (MAX). Thus, the transmission bit-rate of the video encoder can be constrained to lie within a maximum and minimum rate. In an embodiment, the constraints are enforced over relatively short time intervals.

Abstract: The present disclosure relates generally to semiconductor, integrated circuits, and particularly, but not by way of limitation, to centrifugal methods of filling high-aspect ratio vias and trenches with powders, pastes, suspensions of materials to act as any of a conducting, structural support, or protective member of an electronic component.

Abstract: An improved method, system, computer program product, and electronic design structures which provides the flexibility to IC designers to be able to relax the design rules to increase the yield and improve the layout productivity is disclosed. In some disclosed approaches, automated interactive aids and batch tools are provided which can assist in optimizing the final layouts for yield at the initial placement and/or routing stages for optimizing yield. Provided in some disclosed approaches are automated capability to layout designers at the mos devices level to configure mos devices as per different DFY recommendations from the foundry without negative effects on the overall chip area (or cell size). The design rules may be relaxed selectively on an instance basis and wherever possible or desirable.

Abstract: The present disclosure relates generally to semiconductor, integrated circuits, and particularly, but not by way of limitation, to centrifugal methods of filling high-aspect ratio vias and trenches with powders, pastes, suspensions of materials to act as any of a conducting, structural support, or protective member of an electronic component.

Abstract: The present disclosure relates generally to semiconductor, integrated circuits, and particularly, but not by way of limitation, to centrifugal methods of filling high-aspect ratio vias and trenches with powders, pastes, suspensions of materials to act as any of a conducting, structural support, or protective member of an electronic component.

Abstract: An etchant which includes an aqueous solution of between about 30% and about 38% concentrated hydrogen peroxide, said percentages being by volume, based on the total volume of the solution; between about 3.5 ml and about 20 ml per liter of phosphoric acid; and an amount of potassium hydroxide to adjust the pH of the solution to between about 7.8 and about 9.1. The etchant is useful in removing a layer of an alloy of titanium and tungsten or a layer of tungsten from a precision surface.

Abstract: A process and structure for enabling the creation of reliable electrical through-via connections in a semiconductor substrate and a process for filling vias. Problems associated with under etch, over etch and flaring of deep Si RIE etched through-vias are mitigated, thereby vastly improving the integrity of the insulation and metallization layers used to convert the through-vias into highly conductive pathways across the Si wafer thickness. By using an insulating collar structure in the substrate in one case and by filling the via in accordance with the invention in another case, whole wafer yield of electrically conductive through vias is greatly enhanced.

Abstract: An etchant which includes an aqueous solution of between about 30% and about 38% concentrated hydrogen peroxide, said percentages being by volume, based on the total volume of the solution; between about 3.5 ml and about 20 ml per liter of phosphoric acid; and an amount of potassium hydroxide to adjust the pH of the solution to between about 7.8 and about 9.1. The etchant is useful in removing a layer of an alloy of titanium and tungsten or a layer of tungsten from a precision surface.

Abstract: A solution for wet etching a copper film within a ball limiting metallurgy (BLM) of a semiconductor device includes, in an exemplary embodiment, an ammonium persulfate etching agent, a potassium sulfate passivation agent for protecting a PbSn solder material, and a pH modifier for controlling the etch rate of the copper film.

Abstract: A half sample and quarter sample pixel value interpolation calculation classifies a set of all possible half sample and quarter sample pixel value interpolation calculations into a plurality of interpolation types. A function kernel for each interpolation type includes a half sample pixel and all quarter sample pixels whose value calculation depend on a value of said half sample pixel value. The correct function kernel is called invoking the corresponding value interpolation calculation. The function kernels operate iteratively over a plurality of macroblocks of at least two macroblock sub-partition sizes. The calculation of dependent quarter sample pixel values preferably employs a packed average instruction.

Abstract: Sealing a via using a soventless, low viscosity, high temperature stable polymer or a high solids content polymer solution of low viscosity, where the polymeric material is impregnated within the via at an elevated temperature. A supply chamber is introduced to administer the polymeric material at an elevated temperature, typically at a temperature high enough to liquefy the polymeric material. The polymeric material is introduced through heated supply lines under force from a pump, piston, or a vacuum held within said supply chamber.

Abstract: Sealing a via using a soventless, low viscosity, high temperature stable polymer or a high solids content polymer solution of low viscosity, where the polymeric material is impregnated within the via at an elevated temperature. A supply chamber is introduced to administer the polymeric material at an elevated temperature, typically at a temperature high enough to liquefy the polymeric material. The polymeric material is introduced through heated supply lines under force from a pump, piston, or a vacuum held within said supply chamber.

Abstract: The present disclosure relates generally to semiconductor, integrated circuits, and particularly, but not by way of limitation, to centrifugal methods of filling high-aspect ratio vias and trenches with powders, pastes, suspensions of materials to act as any of a conducting, structural support, or protective member of an electronic component.

Abstract: A process for vapor phase fluorination of methylene chloride with anhydrous hydrogen fluoride (AHF) in the presence of a coprecipitated chromia-alumina impregnated with zinc salt as catalyst, removing HCl and heavier components by distillation, subjecting HFC-32 rich cut to a further step of fluorination in the presence of a fluorination catalyst.

Abstract: A process for vapor phase fluorination of methylene chloride with anhydrous hydrogen fluoride (AHF) in the presence of a coprecipitated chromia-alumina impregnated with zinc salt as catalyst, removing HCl and heavier components by distillation, subjecting HFC-32 rich cut to a further step of fluorination in the presence of a fluorination catalyst.

Abstract: The speed of a hardware-software debugger is markedly increased through the use of high speed simulators which ignore all systems operations except those where design errors are expected to manifest themselves, by skipping CPU bus cycles of no interest for the simulation, by not explicitly simulating periodic clock signals and generating only schedules of clock signals, and by caching instructions when alien computers are used in the simulation process to eliminate decoding of the instructions of the target computer.