Abstract: A verification method of a system on chip includes receiving a test generator and an exception handler; generating, by the test generator, a test program including an exception-causing instruction based on a test template; executing a first instruction at a first operating state as the test program is executed; stopping the execution of the test program and performing a fixed instruction sequence included in the exception handler when the exception-causing instruction is executed during the execution of the test program; and resuming the test program from a second instruction at a second operating state set after the fixed instruction sequence is performed, the second instruction corresponding to an address adjacent to an address of the exception-causing instruction.

Abstract: A method for manufacturing a CI(G)S-based thin film using a Cu—Se two-component nanoparticle flux, and a CI(G)S-based thin film manufactured by the method are provided. The method for manufacturing the CI(G)S-based thin film, according to the present invention, comprises the steps of: manufacturing Cu—Se two-component nanoparticles and In nanoparticles; manufacturing a slurry comprising the Cu—Se two-component nanoparticles by mixing the Cu—Se two-component nanoparticles, a solvent, and a binder, and manufacturing a slurry comprising the In nanoparticles by mixing the In nanoparticles, a solvent, and a binder; forming a thin film in which a plurality of layers are laminated by alternately coating the slurry comprising the Cu—Se two-component nanoparticles and the slurry comprising the In nanoparticles on a substrate, regardless of order; and heat-processing the thin film which is formed.

Abstract: Disclosed herein is a device for controlling a sample temperature during photoelectric measurement of the sample. The device for controlling a sample temperature during photoelectric measurement of the sample includes: a sample stage to which a measurement target sample is fixed; a cooling unit for cooling the sample by injecting air; and a temperature measuring unit having a thermometer that measures a temperature of the sample. The device has an effect of easily controlling the temperature of a measurement target sample by employing a direct control method for a sample temperature, in which air or cooled air is injected to the sample.

Abstract: A method of fabricating a CIGS thin film for solar cells using a simplified co-vacuum evaporation process and a CIGS thin film fabricated by the method are disclosed. The method includes: (a) depositing Cu, Ga and Se on a substrate having a substrate temperature ranging from 500° C. to 600° C. through co-vacuum evaporation, (b) depositing Cu, Ga, Se and In through co-vacuum evaporation while maintaining the same substrate temperature as in step (a), and (c) depositing Ga and Se through co-vacuum evaporation, followed by depositing Se alone through vacuum evaporation while lowering the temperature of the substrate. The method can realize crystal growth and band-gap grading by Ga composition distribution while simplifying process steps and significantly reducing a film-deposition time, as compared with a conventional co-vacuum evaporation process, thereby providing improvement in process efficiency.

Abstract: Disclosed are a method of manufacturing a CI(G)S-based thin film including aging of a slurry composed of binary nanoparticles, and a CI(G)S-based thin film manufactured thereby. The method of manufacturing the CI(G)S-based thin film includes: preparing CI(G)S-based binary nanoparticles; mixing the binary nanoparticles, a solution precursor including a CI(G)S-based element, a solvent and a chelating agent, thus preparing a hybrid slurry; aging the hybrid slurry for 5 to 10 days; subjecting the aged hybrid slurry to coating, thus forming a CI(G)S-based thin film; and subjecting the CI(G)S-based thin film to heat treatment. Thereby, high reproducibility can be ensured upon manufacturing a CI(G)S-based thin film for solar cells, and thus reliability of the produced thin film can be increased.

Abstract: A verification method of a system on chip includes receiving a test generator and an exception handler; generating, by the test generator, a test program including an exception-causing instruction based on a test template; executing a first instruction at a first operating state as the test program is executed; stopping the execution of the test program and performing a fixed instruction sequence included in the exception handler when the exception-causing instruction is executed during the execution of the test program; and resuming the test program from a second instruction at a second operating state set after the fixed instruction sequence is performed, the second instruction corresponding to an address adjacent to an address of the exception-causing instruction.

Abstract: Disclosed is a method of forming a chalcopyrite light-absorbing layer for a solar cell, including: forming a thin film including a chalcopyrite compound precursor; and radiating light on the thin film, wherein the chalcopyrite compound precursor absorbs light energy and is thus crystallized. When forming the chalcopyrite light-absorbing layer, light, but not heat, is applied, thus preventing problems, including damage to a substrate due to heat and formation of MoSe2 due to heating of the Mo rear electrode. Furthermore, long-wavelength light, which deeply penetrates the thin film, is first radiated, and short-wavelength light, which shallowly penetrates the thin film, is subsequently radiated, thereby sequentially forming the chalcopyrite light-absorbing layer from the bottom of the thin film.

Abstract: A method, apparatus and computer program product to be employed by a hardware component under validation, wherein the hardware component having a plurality of processing units each belonging to one of at least two types, such that one of the at least two types of processing units is less error-prone then a remainder of the at least two types. The method comprising: designating one of the processing units of the hardware component under validation that belongs to the less error-prone type as a manager processing unit; initiating execution of a tester program code for testing processing units, by processing units of the hardware component other than the manager processing unit; and, monitoring by the manager processing unit the status of the processing units during execution of the tester program code.

Abstract: A method, apparatus and product for test generation. The method comprises generating a first set of instructions for a hardware component, that are to be executed when operating in a first mode of operation; in response to a parsed template statement being a marker statement, generating an intermediary set of one or more instructions to cause the hardware component to change the mode of operation to a second mode in accordance with the marker instruction, and modifying the expected mode of the hardware component to a second mode; and generating a second set of instructions for the hardware component, that are to be executed when operating in the second mode of operation. The generation of instructions comprises determining the expected mode and generating instructions in accordance with the expected mode of the hardware component. The generation is performed without having an expected full state of the hardware component.

Abstract: A solar cell module, a method for manufacturing the solar cell module, a solar power system, and an interconnection ribbon are provided. The solar cell module includes a plurality of solar cells which are connected in series or in parallel through interconnection ribbons, wherein the interconnection ribbons have a zigzag shape to reduce tension generated according to bending of the solar cell module.

Abstract: Disclosed is a method of forming a chalcopyrite light-absorbing layer for a solar cell, including: forming a thin film including a chalcopyrite compound precursor; and radiating light on the thin film, wherein the chalcopyrite compound precursor absorbs light energy and is thus crystallized. When forming the chalcopyrite light-absorbing layer, light, but not heat, is applied, thus preventing problems, including damage to a substrate due to heat and formation of MoSe2 due to heating of the Mo rear electrode. Furthermore, long-wavelength light, which deeply penetrates the thin film, is first radiated, and short-wavelength light, which shallowly penetrates the thin film, is subsequently radiated, thereby sequentially forming the chalcopyrite light-absorbing layer from the bottom of the thin film.

Abstract: Disclosed is an ultra-thin HIT solar cell, including: an n- or p-type crystalline silicon substrate; an amorphous silicon emitter layer having a doping type different from that of the silicon substrate; and an intrinsic amorphous silicon passivation layer formed between the crystalline silicon substrate and the amorphous silicon emitter layer, wherein the HIT solar cell further includes a transparent conductive oxide layer made of ZnO on an upper surface thereof, and the surface of the crystalline silicon substrate is not textured but only the surface of the transparent conductive oxide layer is textured, and thereby a very thin crystalline silicon substrate can be used, ultimately achieving an ultra-thin HIT solar cell having a very low total thickness while maintaining light trapping capacity.

Abstract: The invention relates a thin-film solar cell. In the related art, a buffer layer, a transparent electrode, and a grid electrode are formed on a light absorption layer, but in the invention, the buffer layer and the transparent electrode are not formed on a light absorption layer, and the buffer layer, the transparent electrode, and the grid electrode are formed under a CIGS face such that solar light is directly input to the light absorption layer without obstacles, and the first electrode and the buffer layer are patterned in a saw-toothed structure to engage with each other to reduce a distance by which electrons or holes generated by absorbing light energy move to the electrode or the buffer layer.

Abstract: A method of forming a CIGS absorber layer using a three-stage co-evaporation process, which can improve the efficiency of a solar cell in the case where Na concentration of a substrate is low and thus the depletion layer of the CIGS absorber layer is thick. The method includes a first stage of co-evaporating In, Ga and Se to deposit them; a second stage of co-evaporating Cu and Se to deposit them; and a third stage of co-evaporating In, Ga and Se to deposit them, wherein Ga supply through evaporation in the first stage is greater than Ga supply through evaporation in the third stage.

Abstract: A verification method of a system on chip includes receiving a test generator and an exception handler; generating, by the test generator, a test program including an exception-causing instruction based on a test template; executing a first instruction at a first operating state as the test program is executed; stopping the execution of the test program and performing a fixed instruction sequence included in the exception handler when the exception-causing instruction is executed during the execution of the test program; and resuming the test program from a second instruction at a second operating state set after the fixed instruction sequence is performed, the second instruction corresponding to an address adjacent to an address of the exception-causing instruction.

Abstract: A method of forming a nanometer-scale prominence and depression structure on a zinc oxide thin film in a wet-etching method, and the method includes the steps of: preparing a substrate; forming a nano structure having a height and a width of a nanometer range; forming the zinc oxide thin film on the substrate on which the nano structure is formed; and wet-etching the zinc oxide thin film, in which in the wet-etching step, zinc oxide having relatively low physical compactness is preferentially etched since the zinc oxide is positioned on the nano structure, and thus the prominence and depression structure is formed around the nano structure by the etching. The method is effective in that a thin film can be uniformly formed on the prominence and depression structure, and an electrolyte or an organic material may uniformly penetrate between the prominence and depression structure.

Abstract: Disclosed is an ultra-thin HIT solar cell, including: an n- or p-type crystalline silicon substrate; an amorphous silicon emitter layer having a doping type different from that of the silicon substrate; and an intrinsic amorphous silicon passivation layer formed between the crystalline silicon substrate and the amorphous silicon emitter layer, wherein the HIT solar cell further includes a transparent conductive oxide layer made of ZnO on an upper surface thereof, and the surface of the crystalline silicon substrate is not textured but only the surface of the transparent conductive oxide layer is textured, and thereby a very thin crystalline silicon substrate can be used, ultimately achieving an ultra-thin HIT solar cell having a very low total thickness while maintaining light trapping capacity.

Abstract: A method of fabricating an Ag—(Cu—)In—Ga—Se (A(C)IGS) based thin film using Se—Ag2Se core-shell nanoparticles, an A(C)IGS based thin film fabricated by the method, and a tandem solar cell having the A(C)IGS thin film are disclosed. More particularly, a method of fabricating a densified Ag—(Cu—)In—Ga—Se (A(C)IGS) based thin film by non-vacuum coating a substrate with a slurry containing Se—Ag2Se core-shell nanoparticles, an A(C)IGS based thin film fabricated by the method, and a tandem solar cell including the A(C)IGS based thin film are disclosed. According to the present invention, an A(C)IGS based thin film including Ag is manufactured by applying Se—Ag2Se core-shell nanoparticles in a process of manufacturing a (C)IGS thin film, thereby providing an A(C)IGS based thin film having a wide band gap.

Abstract: Disclosed is a method of manufacturing a CI(G)S-based thin film, in which a slurry prepared by mixing two or more kinds of binary nanoparticles containing CI(G)S-based elements, a solution precursor containing a CI(G)S-based element, an alcoholic solvent and a chelating agent is used to reduce the carbon layer formed between the CI(G)S-based thin film and molybdenum, and which includes (a) mixing two or more kinds of binary nanoparticles containing CI(G)S-based elements, a solution precursor containing a CI(G)S-based element, an alcoholic solvent and a chelating agent, thus preparing a slurry; (b) subjecting the slurry to non-vacuum coating, thus forming a CI(G)S-based thin film; and (c) subjecting the CI(G)S-based thin film to selenization heat treatment.

Abstract: A CIGS solar cell having a flexible substrate based on improved supply of Na. The CIGS solar cell includes a substrate formed of a flexible material, a rear electrode formed on the substrate, a CIGS light-absorption layer formed on the rear electrode, a buffer layer formed on the CIGS light-absorption layer, and a front electrode formed on the buffer layer, wherein the rear electrode comprise a single-layered Na-added metal electrode layer. A single-layered Na-added Mo electrode layer, specific resistance of which is about 1/10th the specific resistance under conditions of a process of forming a typical multilayer rear electrode, is applied to the rear electrode, thereby providing a CIGS solar cell having a flexible substrate and high conversion efficiency.