Abstract: A multi-layer distributed network element for relaying packets according to known routing protocols. A distributed architecture of multiple subsystems delivers routing at wire-speed performance across subnetworks. Each subsystem includes a forwarding memory and an associated memory and is configured to identify unicast and multicast packets for routing purposes, modify the packets in hardware, including replace VLAN information, and forward the packets to the next hop. The routing decisions are made in the inbound subsystem, and packets and associated control information are forwarded, if necessary given the network topology, through a separate outbound subsystem. When packets traverse the internal links from one subsystem to another, encapsulation operations are conducted such as appending an additional cyclic redundancy code (CRC) to the packet before going through the internal link.

Abstract: Transmission rates of 1 Gb/sec. at up to at least 200 m diameter distances are achieved in an Ethernet environment by functionally decoupling frame size to network roundtrip time. This decoupling is achieved by extending the duration of the minimum size event to exceed the network roundtrip time. This extension of the carrier event is made without extending the data field and without altering the frame check sequence. Code implementing the media access control layer and reconciliation layer at the transmitting and receiving end of the network is modified such that at 1 Gb/sec. half-duplex, non-data symbols are appended to the end of short packet frames. The collision window is extended to include these symbols, which extension symbols are also included in fragment discard calculations. The extension is removed, however, before checking the frame check sequence, and before passing the frame to logical link and control.

Abstract: A multi-layer switch search engine architecture is provided. According to one aspect of the present invention, a switch fabric includes a search engine, and a packet header processing unit. The search engine may be coupled to a forwarding database memory and one or more input ports. The search engine is configured to schedule and perform accesses to the forwarding database memory and to transfer forwarding decisions to the one or more input ports. The header processing unit is coupled to the search engine and includes an arbitrated interface for coupling to the one or more input ports. The header processing unit is configured to receive a packet header from one or more of the input ports and is further configured to construct a search key for accessing the forwarding database memory based upon a predetermined portion of the packet header. The predetermined portion of the packet header is selected based upon a packet class with which the packet header is associated.

Abstract: A multi-layer distributed network element for relaying packets according to known routing protocols. A distributed architecture of multiple subsystems delivers routing at wire-speed performance across subnetworks. Each subsystem includes a forwarding memory and an associated memory and is configured to identify unicast and multicast packets for routing purposes, modify the packets in hardware, including replace VLAN information, and forward the packets to the next hop. The routing decisions are made in the inbound subsystem, and packets are forwarded, if necessary given the network topology, through a separate outbound subsystem.

Abstract: A method and apparatus for providing hardware-assisted CPU access to a forwarding database is described. According to one aspect of the present invention, a switch fabric provides access to a forwarding database on behalf of a processor. The switch fabric includes a memory access interface configured to arbitrate access to a forwarding database memory. The switch fabric also includes a search engine coupled to the memory access interface and to multiple input ports. The search engine is configured to schedule and perform accesses to the forwarding database memory and to transfer forwarding decisions retrieved therefrom to the input ports. The switch fabric further includes command execution logic that is configured to interface with the processor for performing forwarding database accesses requested by the processor.

Abstract: Method and apparatus for buffering data packets in a data communication controller environment. In general, the communication controller is interfaceable with a host processor and includes a control unit for accessing a communication medium. Each data packet to be transmitted or received is assigned a unique packet number. Packet number assignment is carried out by a memory management unit which dynamically allocates to each assigned packet number, one or more pages in data packet buffer memory for the storage of the corresponding data packet. If requested storage space is unavailable at the time of request, the memory management unit will allocate a page or pages to an available packet number as the pages become free. Upon issuing the assigned packet number, the physical addresses of the allocated pages of buffer memory storage space are generated in a manner transparent to both the host processor and the control unit.

Abstract: Method and apparatus are disclosed for buffering data packets in a data communication controller. The communication controller is interfaced with a host processor and includes a control unit for accessing a communication medium. Each data packet to be transmitted or received is assigned a packet number. Packet number assignment is carried out by a memory management unit within the communication controller which dynamically allocates to each assigned packet number one or more pages in a data packet buffer memory for the storage of the corresponding data packet. Upon issuing the assigned packet number, the physical addresses of the allocated pages of data packet buffer memory storage space are generated in a manner transparent to both the host processor and the control unit.

Abstract: Method and apparatus are provided for data communication control within the communication controllers of stations within a local area network. In general, the method and apparatus involves maintaining within the command and status control interface unit of the communication controller, receive and transmit command queues as well as receive and transmit status queues. Pluralities of receive and transmit data packet storage locations are provided for storing data packets to be received as well as transmitted. Each receive command is uniquely associated with a data packet storage location. Receive and transmit commands are buffered in a pipeline manner in the receive and transmit command queues, respectively, whereas receive and transmit status bits are buffered in a pipeline manner in the receive and transmit status queues, respectively.