Patents by Inventor Arjang Fartash

Arjang Fartash has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8390423
    Abstract: A nanoflat resistor includes a first aluminum electrode (360), a second aluminum electrode (370); andnanoporous alumina (365) separating the first and second aluminum electrodes (360, 370). A substantially planar resistor layer (330) overlies the first and second aluminum electrodes (360, 370) and nanoporous alumina (365). Electrical current passes from the first aluminum electrode (360), through a portion of the planar resistor layer (350) overlying the nanoporous alumina (365) and into the second aluminum electrode (370). A method for constructing a nanoflat resistor (390) is also provided.
    Type: Grant
    Filed: May 19, 2009
    Date of Patent: March 5, 2013
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Arjang Fartash, Peter Mardilovich
  • Patent number: 8388112
    Abstract: Disclosed is a printhead having at least one ink drop generator region, which includes an ink chamber, an orifice through which ink drops are ejected, and a heating element positioned below the ink chamber. The heating element includes a resistor defined therein and a nano-structured surface that is exposed to the ink fluid supplied to the ink chamber. The nano-structured surface takes the form of an array of nano-pillars. The printhead is fabricated by a method that includes: forming a heating element having an oxidizable metal layer as the uppermost layer; forming an aluminum-containing layer on the oxidizable metal layer; anodizing the aluminum-containing layer to form porous alumina; anodizing the oxidizable metal layer so as to partially fill the pores in the porous alumina with metal oxide material; and removing the porous alumina by selective etching to produce a nano-structured surface.
    Type: Grant
    Filed: February 24, 2009
    Date of Patent: March 5, 2013
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Peter Mardilovich, Neal Wayne Meyer, Arjang Fartash
  • Publication number: 20120062355
    Abstract: A nanoflat resistor includes a first aluminum electrode (360), a second aluminum electrode (370); and nanoporous alumina (365) separating the first and second aluminum electrodes (360, 370). A substantially planar resistor layer (330) overlies the first and second aluminum electrodes (360, 370) and nanoporous alumina (365). Electrical current passes from the first aluminum electrode (360), through a portion of the planar resistor layer (350) overlying the nanoporous alumina (365) and into the second aluminum electrode (370). A method for constructing a nanoflat resistor (390) is also provided.
    Type: Application
    Filed: May 19, 2009
    Publication date: March 15, 2012
    Inventors: Arjang Fartash, Peter Mardilovich
  • Publication number: 20110310182
    Abstract: Disclosed is a printhead having at least one ink drop generator region, which includes an ink chamber, an orifice through which ink drops are ejected, and a heating element positioned below the ink chamber. The heating element includes a resistor defined therein and a nano-structured surface that is exposed to the ink fluid supplied to the ink chamber. The nano-structured surface takes the form of an array of nano-pillars. The printhead is fabricated by a method that includes: forming a heating element having an oxidizable metal layer as the uppermost layer; forming an aluminum-containing layer on the oxidizable metal layer; anodizing the aluminum-containing layer to form porous alumina; anodizing the oxidizable metal layer so as to partially fill the pores in the porous alumina with metal oxide material; and removing the porous alumina by selective etching to produce a nano-structured surface.
    Type: Application
    Filed: February 24, 2009
    Publication date: December 22, 2011
    Applicant: Hewlett-Packard Development Company, L.P.
    Inventors: Peter Mardilovich, Neal Wayne Meyer, Arjang Fartash
  • Patent number: 7552533
    Abstract: A fluid ejector head is manufactured. Sidewalls of at least one fluid ejection chamber are defined about at least one fluid drop generator disposed over a substrate. At least one bore is created over the at least one fluid ejection chamber. The at least one bore has a first nozzle surface proximate to the at least one fluid ejection chamber, and a second nozzle surface distal to the at least one fluid ejection chamber. An initial deposit of a protective layer material is deposited at a low substrate bias voltage through the at least one bore. A portion of the initial deposit of the protective layer material is redistributed on the sidewalls at a high substrate bias voltage. An inorganic protective layer is formed on the sidewalls of the at least one fluid ejection chamber and on a portion of the first nozzle surface.
    Type: Grant
    Filed: July 25, 2005
    Date of Patent: June 30, 2009
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventor: Arjang Fartash
  • Patent number: 7517060
    Abstract: A cavitation structure for a print head has a first dielectric layer overlying at least a first portion of a substrate. A second dielectric layer has a first portion overlying at least a second portion of the substrate and a second portion, different from the first portion of the second dielectric layer, overlying at least a portion of the first dielectric layer. A cavitation layer has a first portion in contact with the first dielectric layer and a second portion in lateral contact with the second portion of the second dielectric layer. A third dielectric layer is disposed on only the first portion of the second dielectric layer.
    Type: Grant
    Filed: February 2, 2006
    Date of Patent: April 14, 2009
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Ulrich E. Hess, Samson Berhane, Arjang Fartash
  • Patent number: 7445810
    Abstract: A method of making tantalum structures, including, creating a tantalum layer disposed on a first layer region of a first layer and on a second layer region of a second layer. The tantalum layer has a substantially bcc-phase tantalum region on the first layer region, and a non-bcc-phase tantalum region on the second layer region.
    Type: Grant
    Filed: April 15, 2004
    Date of Patent: November 4, 2008
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventor: Arjang Fartash
  • Publication number: 20070097476
    Abstract: A display system includes a housing having at least one optical window and at least one charge-controlled spatial light-modulator disposed within the housing. The at least one spatial light-modulator is configured to project an image-bearing light beam to a viewing surface through the at least one optical window. The system further includes at least one electron gun selectively positioned at a predetermined angle with respect to the at least one spatial light-modulator. The electron gun is configured to project an electron beam into the housing to impinge a front surface of the at least one spatial light-modulator.
    Type: Application
    Filed: October 28, 2005
    Publication date: May 3, 2007
    Inventors: Martha Truninger, Melinda Valencia, Steve Hanson, Loreli Fister, Arjang Fartash, George Radominski, Timothy Emery, Robert Shreeve, Matthew Rocha, Alexander Govyadinov
  • Patent number: 7132132
    Abstract: A method of forming a fluid ejection device is disclosed. The steps of forming the fluid ejection device may include forming a heating element on a substrate. The steps for forming the fluid ejection device may further include depositing a buffer layer over the heating element, and depositing a layer of compressive alpha-tantalum on the buffer layer with lattice matching between the layer of compressive alpha-tantalum and the buffer layer.
    Type: Grant
    Filed: February 25, 2005
    Date of Patent: November 7, 2006
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventor: Arjang Fartash
  • Patent number: 7131193
    Abstract: An apparatus to retain an assembled component on one side of a double-sided printed circuit board during reflow of other components subsequently positioned on an opposite side of the double-sided printed circuit board and methods for manufacturing and using the same. The retainer includes a heat-shrinkable member and a retaining member. Being formed from a heat-shrinkable material, the heat-shrinkable member is configured to receive a post extending through an opening formed in a double-sided printed circuit board from a component previously assembled on one side thereof. The retaining member is coupled with the heat-shrinkable member, and the double-sided printed circuit board is disposed substantially between the retaining member and the component. The heat-shrinkable member is configured to shrinkably engage the post when an opposite side of the double-sided printed circuit board is populated and reflowed, retaining the inverted component on the double-sided printed circuit board.
    Type: Grant
    Filed: May 17, 2004
    Date of Patent: November 7, 2006
    Assignee: Intel Corporation
    Inventors: Arjang Fartash, Christopher D. Combs, Raiyomand Aspandiar, Tom E. Pearson
  • Patent number: 7081306
    Abstract: A layer of compressive alpha-tantalum is formed on a substrate by depositing a buffer layer on the substrate and depositing a layer of compressive alpha-tantalum on the buffer layer with lattice matching between the layer of compressive alpha-tantalum and the buffer layer. A bias may be applied to the substrate during deposition of the buffer layer and/or compressive alpha-tantalum layer. In some embodiments, the method may include depositing buffers layers comprising titanium, niobium, substantially pure aluminum or aluminum-copper alloy.
    Type: Grant
    Filed: July 12, 2005
    Date of Patent: July 25, 2006
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventor: Arjang Fartash
  • Publication number: 20060125882
    Abstract: Atomic layer deposition forms a cavitation layer of a print head.
    Type: Application
    Filed: February 2, 2006
    Publication date: June 15, 2006
    Inventors: Ulrich Hess, Samson Berhane, Arjang Fartash
  • Patent number: 7025894
    Abstract: Atomic layer deposition forms a cavitation layer of a print head.
    Type: Grant
    Filed: July 16, 2003
    Date of Patent: April 11, 2006
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Ulrich E. Hess, Samson Berhane, Arjang Fartash
  • Publication number: 20050253902
    Abstract: A chamber includes a substrate, a chamber layer disposed on the substrate that defines the sidewalls of the chamber, and the chamber layer has a chamber surface. The chamber has an area in the plane formed by the chamber surface in the range from about 1 square micrometer to about 10,000 square micrometers. The chamber also includes an orifice layer disposed over the chamber layer. The orifice layer has a first and second orifice surface and a bore wherein the bore has an area in the plane formed by the first orifice surface less than the chamber area. The chamber further includes a protective layer deposited, through the bore, on the sidewalls of the chamber layer and a portion of the first orifice surface.
    Type: Application
    Filed: July 25, 2005
    Publication date: November 17, 2005
    Inventor: Arjang Fartash
  • Publication number: 20050250313
    Abstract: A layer of compressive alpha-tantalum is formed on a substrate by depositing a buffer layer on the substrate and depositing a layer of compressive alpha-tantalum on the buffer layer with lattice matching between the layer of compressive alpha-tantalum and the buffer layer. A bias may be applied to the substrate during deposition of the buffer layer and/or compressive alpha-tantalum layer. In some embodiments, the method may include depositing buffers layers comprising titanium, niobium, substantially pure aluminum or aluminum-copper alloy.
    Type: Application
    Filed: July 12, 2005
    Publication date: November 10, 2005
    Inventor: Arjang Fartash
  • Publication number: 20050233159
    Abstract: A method of making tantalum structures, including, creating a tantalum layer disposed on a first layer region of a first layer and on a second layer region of a second layer. The tantalum layer has a substantially bcc-phase tantalum region on the first layer region, and a non-bcc-phase tantalum region on the second layer region.
    Type: Application
    Filed: April 15, 2004
    Publication date: October 20, 2005
    Inventor: Arjang Fartash
  • Patent number: 6955835
    Abstract: A layer of compressive alpha-tantalum is formed on a substrate by depositing a buffer layer on the substrate and depositing a layer of compressive alpha-tantalum on the buffer layer with lattice matching between the layer of compressive alpha-tantalum and the buffer layer. In some embodiments, the method may include depositing buffers layers comprising titanium, niobium, substantially pure aluminum or aluminum-copper alloy.
    Type: Grant
    Filed: April 30, 2003
    Date of Patent: October 18, 2005
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventor: Arjang Fartash
  • Patent number: 6942318
    Abstract: A chamber includes a substrate, a chamber layer disposed on the substrate that defines the sidewalls of the chamber, and the chamber layer has a chamber surface. The chamber has an area in the plane formed by the chamber surface in the range from about 1 square micrometer to about 10,000 square micrometers. The chamber also includes an orifice layer disposed over the chamber layer. The orifice layer has a first and second orifice surface and a bore wherein the bore has an area in the plane formed by the first orifice surface less than the chamber area. The chamber further includes a protective layer deposited, through the bore, on the sidewalls of the chamber layer and a portion of the first orifice surface.
    Type: Grant
    Filed: May 31, 2002
    Date of Patent: September 13, 2005
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventor: Arjang Fartash
  • Publication number: 20050175768
    Abstract: A fluid ejection device is disclosed. The fluid ejection device may include a substrate including a heating element and a passivation layer in contact with the heating element. The fluid ejection device may further include a buffer layer in contact with the passivation layer and a compressive alpha-tantalum layer in contact with, and lattice matched to, the buffer layer.
    Type: Application
    Filed: February 25, 2005
    Publication date: August 11, 2005
    Inventor: Arjang Fartash
  • Patent number: 6926390
    Abstract: The invention includes a method of forming mixed-phase compressive tantalum thin films using nitrogen residual gas. The method of the present invention may include selecting a pressure of nitrogen residual gas during plasma sputtering corresponding to a predefined ratio of beta- to alpha-tantalum. The method may be performed at substrate temperatures less than 300° C. Mixed-phase compressive tantalum thin films and fluid ejection devices are also disclosed.
    Type: Grant
    Filed: February 5, 2003
    Date of Patent: August 9, 2005
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventor: Arjang Fartash